AMD: R8xx Speculation

[Shtal]

I don't think anyone really thinks the cards would be capable of SM5.0, but Tesselation & Compute Shaders could be separated from SM5.0 (as in, don't require SM5.0 supporting GPU, just SM4.0 for compute shaders & tesselation unit for tesselation, think of geometry instancing, "sm3.0 card" classed feature which could be supported by ATI SM2.0 GPUs aswell, now just remove the need for "hacks" to use the feature on older cards and you're good to go)

Thanks!

 

[Shtal]

DirectX 11 promises to unlock the horsepower in multi-core CPUs and enable GP GPUs

http://www.tgdaily.com/content/view/38660/98/

 

[Arnold Beckenbauer]

http://www.tgdaily.com/content/view/38660/98/

Tessellation is also a big add-on. Tessellation is a super-set of something that was debuted with the Xbox 360’s ATI R500 Xenos GPU. Trust us, there is plenty more to come. Tessellation will work on compatible DX10, 10.0, DX11 hardware

DAAMIT did a good work, if their R600's tessellation can be used with D3D11.

 

[fellix]

I really hope the game dev's would put the HW tessellation at good use some time around DX11 establishment. Global LOD systems in numerous game engines would benefit greatly from that, I think.

 

[liolio]

DAAMIT did a good work, if their R600's tessellation can be used with D3D11.

Maybe Ms has good reason to make this units supported

I think about benefit from these development efforts on the 360 which include one tessellation unit.

 

[Jawed]

Somehow I suspect that RV770 and earlier tessellation, at best, will only be a subset of D3D11 tessellation. If there are control shaders and a different ordering for pipeline operations involved in tessellation in D3D11 then all we might be seeing in D3D10/10.1/ATI tessellation is some kind of "basic" functionality.

Perhaps similar to the way that render to vertex buffer (using pixel shaders) is a partial capability for certain kinds of vertex-texturing type operations under D3D9/10.

Jawed

 

[chavvdarrr]

any idea if tesselation units in R6xx are/will be used anywhere?!
The whole idea with puting dedicated hardware for something that noone uses puzzles me

 

[pjbliverpool]

any idea if tesselation units in R6xx are/will be used anywhere?!
The whole idea with puting dedicated hardware for something that noone uses puzzles me

I think Viva Pinata used it on the PC.

 

[ShaidarHaran]

I think Viva Pinata used it on the PC.

Well it certainly used it on the 360, I didn't even know there was a PC version of Viva Pinata

 

[pjbliverpool]

Well it certainly used it on the 360, I didn't even know there was a PC version of Viva Pinata

Lol, I knew someone would say that Its amazing how many console games (fairly big ones at that) make it to the PC completely unnoticed, and yet we are bomabarded with the complaint that there are no good games on the PC.

 

[CJ]

any idea if tesselation units in R6xx are/will be used anywhere?!
The whole idea with puting dedicated hardware for something that noone uses puzzles me

Cloud 9

 

[MfA]

Nao, what specifically couldn't they do in your opinion? They have scatter and gather, at that point they are pretty much general ... there's a lot of things they can't do efficiently, but not a lot they can't do at all. One of the RV670 diagrams also shows a feedback path from the shader export to the setup engine ... their tesselator might not be able to handle the tesselation, but that doesn't really exhaust their options in and of itself.

 

[whocares]

RV870 codenamed "Lil Dragon", 40nm :

http://www.nordichardware.com/news,7999.html

Wider memory bus ? 320 bit ? is it possible ?

 

[Shtal]

If ROPs are tied to memory bus width, then they'd stay at 16. TMUs are tied to the shader core, so they'd be at 48. The rest of their numbers are just naive estimates: 960 / 800 = 1.2, 260 * 40^2 / 55^2 ~= 140.

They seem pretty confident about the 960 (though last time we heard both 480 and 800 ). How high is GDDR5 supposed to clock by next year? Could they get close to 4870 bandwidth with a ~128-bit bus?

http://www.nordichardware.com/news,7999.html

The overall performance has been suggested to be somewhere around 20% better than RV770 with a significant drop in power consumption. This points to 960 shaders (192x5), 48 texture units, 40 ROPs and so forth.

I though Pete said it will stay at 16, it has to be a mistake for 40 ROP's.

 

[Shtal]

RV870 at 40nm is 140m㎡ - is it possible? - I calculated RV770 at 40nm will be @118m㎡

EDIT: Extra 32 ALU's, 8TMU's, 8ROP's, ATI wil try to fit into ~22m㎡ to make up total 140m㎡ - how??

 

[Lukfi]

I pretty much think they'll stick to 256bit bus and 16 RBEs. If needed, the RBEs can be beefed up somehow, or cut down and doubled. Depends on the way you count it, because to be exact there are four "units" in RV770 each handling one 64bit mem. channel and capable of a certain number of raster operations. The same should be true for RV870 as well, since I don't expect GDDR5 to be a bottleneck with a 256b interface.

But I find it weird for a 40nm chip to have only 192 ALUs if ATI can put 160 on a not-that-big chip at 55nm.

 

[Shtal]

http://www.nordichardware.com/news,7999.html


I though Pete said it will stay at 16, it has to be a mistake for 40 ROP's.

They just fixed to 24 ROPs, probably typo?

 

[Arun]

20% better? Oh yay, yet some more ATI FUD to try to make NVIDIA underestimate them. As if we hadn't seen that one before!

 

[Kaotik]

20% better? Oh yay, yet some more ATI FUD to try to make NVIDIA underestimate them. As if we hadn't seen that one before!

Or then the chips will actually appear much sooner than thought (how soon TSMC is ready for fullscale 45 or 40nm production?), possibly even named RV790 or something instead of RV870, basic shrink with a bit added on top?

 

[Shtal]

20% better? Oh yay, yet some more ATI FUD to try to make NVIDIA underestimate them. As if we hadn't seen that one before!

You mean Nvidia believed RV770 will be slightly better then RV670 with only 480SP's (96 *5D) for RV770.

EDIT: Or 20% better for RV770b @ 40nm clocked 900MHz for the GPU.