AMD: R8xx Speculation
- Thread starter Shtal
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good point.
IMHO the 140mm² cannot be correct also because even with a geometrical perfect scaling a RV870 with 960 SPs and 48TMUs would be larger than 140mm². Only a RV870 with the same amount of units as the the RV770 and a (nearly impossible) perfect scaling could be as small as 140mm²
140mm² x 55²/40² = 265mm² !!
I would bet for a die size around the RV670 one (~192 sq.mm) -- that's with the two additional MPUs and other minor updates. And if ATi manages to compact even more the overall structure, I really hope the new manufacturing process is power-switching efficient with minimum possible leaking. After all, this chip could boast [probably] over one billion transistors, tightly squeezed just under 200 sq.mm area -- potentially, a very hot spot.
Party pooper !
Buy yeah, wtf are you guys getting all excited about? Same for the GT300 rumour crap. Every single time people make up ridiculous specs people gobble them up like gospel as if they had any basis in reality. Notice how the 800 SP rumour for RV770 didn't start off as some fantabulous fanboy dream?
Sound_Card
Regular
Actually to the contrary. :smile:
When I heard RV770 was 800sp, I thought it was just made up crap. 480sp I could believe and that is what many of the sites reported to be. You never know what to expect sometimes. Although I think it's way too early to start the GPU gossip mill.
When I heard RV770 was 800sp, I thought it was just made up crap. 480sp I could believe and that is what many of the sites reported to be. You never know what to expect sometimes. Although I think it's way too early to start the GPU gossip mill.
Sound_Card
Regular
True and I agree. Like I said, I think it's a bit early to make any guess. Perhaps October we can start to see whats going on.
chavvdarrr
Veteran
also according to DB, AMD shooted for 640sp and only added another 2 SIMDs when they discovered they have "free" on-die space.
So, I see we are back to the unified memory speculation but seriously, how much reliable info about the next gen do we have? As to the rumours about R800 being four GPUs, I don't think that's probable. Years ago, monolithic GPU was the "sweet spot" for the high-end, two 6600 GTs in SLI could not beat one 6800 GT. Now, the sweet number is 2. And it's not going to be 4 anytime soon.
but seriously, how much reliable info about the next gen do we have? As to the rumours about R800 being four GPUs, I don't think that's probable. Years ago, monolithic GPU was the "sweet spot" for the high-end, two 6600 GTs in SLI could not beat one 6800 GT. Now, the sweet number is 2. And it's not going to be 4 anytime soon.4 or more chips could easily be the sweet spot if we've moved away from AFR to an architecture where the driver sees all four chips as being one big virtual GPU. Think about the way (say) Voodoo 2 used to work: there were a total of 3 chips on the card, one pixel processor and two texel processors. Each chip had its own separate memory pool. But the api perceived the whole thing as single device. You certainly wouldn't want to divide things up the same way in a moden device
but, in principle, there's no reason why TMUs and ALU clusters can't be distributed across more than one chip die.Freak'n Big Panda
Regular
You'd need one hell of a bus between the dies to make that work. I don't think it's possible with current technology.
Exactly! Ever heard of LucidLogix Hydra? They say it can do this with today's GPUs. But we have yet to see it in action.
Not sure about that. Frankly, I don't have the faintest idea about what communication occurs between those parts of the GPU, however I think you'd need some humongous bandwidth between the dies to make it work. For that you'd need some communication logic, the die size would grow... then you'd need to properly balance the sizes and throughputs of the separate memory pools and still you'd never get the ideal ratio for the most games. Besides, the point isn't to break the GPU into smaller pieces at any cost, but to use less chips for more market segments. For that reason it's good if the chips are all identical and every one of them can function as a stand-alone GPU. The downside is, you have to make a choice between more multi-GPU specific logic that benefits the high-end cards, and less of this logic that yields better perf/price in the lower end. And maybe that's why two mainstream GPUs are the sweet spot and for the low-end it's better having different chips.nicolasb said:Think about the way (say) Voodoo 2 used to work: there were a total of 3 chips on the card, one pixel processor and two texel processors. Each chip had its own separate memory pool. But the api perceived the whole thing as single device. You certainly wouldn't want to divide things up the same way in a moden device
[Citation Needed]
Not that I don't believe you, I've just never seen this referred to anywhere.
EDIT: Chips! Chips is what I hanging on - never mind, you're right.
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Most 3dfx products were multiple-chip. Even the original voodoo 1 was a two-chip card (and their professional "Obsidian" range used more than two). Voodoo 2 in SLI mode was using a total of 6 chips and no AFR (although that did require duplication of data between the cards, so it's not such a good example). The Voodoo 5 was also highly scalable - there were one-chip, two-chip and four-chip versions of it (and still no AFR). There have been plenty of other multi-chip architectures in the past: the original version of PowerVR had separate ISP and TSP chips (and one of the selling points was that putting additional ISP chips on the card would result in virtually linear performance scaling). The ill-fated Glaze 3D was multi-chip as well.[Citation Needed]
Not that I don't believe you, I've just never seen this referred to anywhere.
EDIT: Chips! Chips is what I hanging on - never mind, you're right.
I don't think any modern multi-chip product would use separate memory pools - that was just a bodge to increase the effective memory bus width in a way that didn't result in unmanageably large chips (this being back in 350nm days).
There's been much speculation in the past that the reason ATI started getting into ring-buses was that they eventually wanted to extend the ring-bus off the chip and have different dies acting as stops on the same card-wide ring-bus. (The fact that they seem to have given up on ring-buses now may put a dent in that theory).
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I wouldn't mark the Ring Bus as dead yet.
It wasn't needed in R600 or RV770. But that doesn't mean that ATI aren't planning big things with the Ring Bus. They've plunged a lot of R&D into it, and it certainly looks very efficient when used correctly (i.e. Not when you use it for things like UVD
).Freak'n Big Panda
Regular
Do you know if the Voodoo 5 suffered from the geometry scaling problem that SLI/Xfire setups suffer from when using SFR or a tiling approach? I would assume it would...
I'm also curious to know how well games scaled from the 1 chip Voodoo 4 to the 2 chip voodoo 5. It should be somewhere in the neighborhood of 20-30% if SFR/Tiling scaling on modern hardware is anything to go by.
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