Second Gen Cell info

[j^aws]

2 multiply-add VMX units, minimum 4 instructions /cycle with 2 threads

Hah! So you've worked out that Xenon cores have two VMX units per core!

 

[archie4oz]

Not so sure I'd agree. At DVD bitrate, we're talking 1 MB/s per stream.
48 streams = 48 MB/s.

That's assuming they're DVD bit-rate streams... For all intensive porposes they could also be Betacam SX streams or IMX streams as well..

 

[Tacitblue]

Here's something done best to scale with the best picture i could find of the prototype PPE core compared to the production model, Quite a bit bigger.

 

[version]

prototype:

1 VMX
1 FPU
1 INT ALU
2 instrtuctions/cycle
2 thread
32 Gflops at 4 Ghz

new modell:

1 full VMX
1 extra multiply-add VMX unit
1 FPU
2 INT ALU
4 instructions/cycle
2 thread
64 Gflops at 4 Ghz

 

[Tacitblue]

If true, not bad for the extra 15 million transistors or so. Prototype 235M, Production ~250M.

 

[j^aws]

prototype:

1 VMX
1 FPU
1 INT ALU
2 instrtuctions/cycle
2 thread
32 Gflops at 4 Ghz

new modell:

1 full VMX
1 extra multiply-add VMX unit
1 FPU
2 INT ALU
4 instructions/cycle
2 thread
64 Gflops at 4 Ghz

Aren't the two VMX units identical?

 

[Titanio]

They added a second VMX unit?

I guess this makes 2 VMX units per core in X360 more feasible?

That'd bring cell up to...what...328Gflops at 4Ghz (with 8 SPEs)?

 

[version]

Aren't the two VMX units identical?

VMX unit:

1 floating unit
1 integer unit
permute unit
registers block

new PPE has 2 floatng units, 1 integer, 1 permute and 1 registerblock

this is 1.5 VMX

 

[Titanio]

Aren't the two VMX units identical?

VMX unit:

1 floating unit
1 integer unit
permute unit
registers block

new PPE has 2 floatng units, 1 integer, 1 permute and 1 registerblock

this is 1.5 VMX

Interesting...

How would this affect flop ratings?

 

[j^aws]

Aren't the two VMX units identical?

VMX unit:

1 floating unit
1 integer unit
permute unit
registers block

new PPE has 2 floatng units, 1 integer, 1 permute and 1 registerblock

this is 1.5 VMX

Those VMX units look identical to each other in the PPE image though?

 

[rendezvous]

Version, may I ask from where you got this information?
The number of added units, the partitioning of the VMX, integer and FPU units and the number of instructions / cycle.

It makes so much sense that I need to know the source

 

[Panajev2001a]

prototype:

1 VMX
1 FPU
1 INT ALU
2 instrtuctions/cycle
2 thread
32 Gflops at 4 Ghz

new modell:

1 full VMX
1 extra multiply-add VMX unit
1 FPU
2 INT ALU
4 instructions/cycle
2 thread
64 Gflops at 4 Ghz

On what basis can you say that ?

 

[version]

Those VMX units look identical to each other in the PPE image though?

yes, VMX's unit similar or equal? SPE's units
and SPE's DP equal PPE's FPU

 

[version]

Version, may I ask from where you got this information?
The number of added units, the partitioning of the VMX, integer and FPU units and the number of instructions / cycle.

It makes so much sense that I need to know the source

no source , sorry
i probably read in the DIE

 

[Panajev2001a]

Aren't the two VMX units identical?

VMX unit:

1 floating unit
1 integer unit
permute unit
registers block

new PPE has 2 floatng units, 1 integer, 1 permute and 1 registerblock

this is 1.5 VMX

Those VMX units look identical to each other in the PPE image though?

Say, just as an hypothetical thing, that the VMX unit in XeCPU has a 128x128 bits Register File (so 4 of those blocks that Version marked) and that the we had two copies of the Register File one for each HW thread (two contexts): we are now taking 8 of those blocks for one VMX unit.

Take that XeCPU might have between 1-2 MB of L2 cache (so 2-4x the amount of L2 you see in that PPE although shared by the three cores).

Well, now imagine the XeCPU having three of those more complex PPE cores and that 1-2 MB block of L2... well it seems a not tiny chip to me .

I do not think what you see is two VMX units, but just a big VMX unit .

 

[j^aws]

Aren't the two VMX units identical?

VMX unit:

1 floating unit
1 integer unit
permute unit
registers block

new PPE has 2 floatng units, 1 integer, 1 permute and 1 registerblock

this is 1.5 VMX

Those VMX units look identical to each other in the PPE image though?

Say, just as an hypothetical thing, that the VMX unit in XeCPU has a 128x128 bits Register File (so 4 of those blocks that Version marked) and that the we had two copies of the Register File one for each HW thread (two contexts): we are now taking 8 of those blocks for one VMX unit.

Take that XeCPU might have between 1-2 MB of L2 cache (so 2-4x the amount of L2 you see in that PPE although shared by the three cores).

Well, now imagine the XeCPU having three of those more complex PPE cores and that 1-2 MB block of L2... well it seems a not tiny chip to me .

I do not think what you see is two VMX units, but just a big VMX unit .

Hmm...I see 4 register blocks identical in size. The basic block would be a 32.64 bit register block.

1 FPU -> 32.64 bit
1 INT -> 32.64 bit
1 VMX -> 2*32.64 bit -> 32.128 bit

So they add up...

@ Version, are you sure???

 

[version]

1 FPU -> 32.64 bit
1 INT -> 32.64 bit
1 VMX -> 2*32.64 bit -> 32.128 bit

So they add up...

@ Version, are you sure???

every registerblock is double sized because 2 thread

 

[j^aws]

1 FPU -> 32.64 bit
1 INT -> 32.64 bit
1 VMX -> 2*32.64 bit -> 32.128 bit

So they add up...

@ Version, are you sure???

every registerblock is double sized because 2 thread

In that case, the ratio remains the same still...

You would expect another set of VMX register blocks i.e another 'two' of those blocks for a 2nd VMX unit?

 

[Panajev2001a]

1 FPU -> 32.64 bit
1 INT -> 32.64 bit
1 VMX -> 2*32.64 bit -> 32.128 bit

So they add up...

@ Version, are you sure???

every registerblock is double sized because 2 thread

Well, but we do not see this extra HW context something that we could suppose would be there if we suppose there is this supposedly supposable ingredient of the mix of the extra spicy sauce added to the VMX units in each of Xenon CPU's PPE's.

We do not see the extra context for the VMX unit there version, sorry.

 

[version]

You would expect another set of VMX register blocks i.e another 'two' of those blocks for a 2nd VMX unit?

why want 2 VMX units?) full vmx size is big, 1/3 PPE size
with 2 thread and 2 multiply-add units you feel as if you have 2 VMX units
this design is cheap, and there 8 SPE