If it would be true that "We know everything about multi-graphics card solutions", why do we have this crappy AFR solutions?
Could it be that for now MSFT through Direct x and Kronos through Open CL never considered that there really was a purpose for multi gpu in the 3d realtime rendering realm?
It may be an false memory, but I remember an eminent member here, Andrew Lauritzen, I hope I'm not wrong, stating that the issue was more related to the API than to really tricky software engineering problem. I'm sure searching the whole forum with those pretty loose criteria (his wording may have been different) is likely to return me nothing (especially as it could be another devs, researchers. Though I read it from a member well within 3d).
Seeing Pitcairn at 212mm² and Tahiti at 365mm² at the beginning of the 28nm life cycle, it won't be a problem at all to get 300+mm² dies with very high yields in a year from now. And a single chip solution simplifies later shrinks tremendeously (smaller individual chips may be prone to pad limitations). Even if the production cost for the single die may be a bit higher (which probably won't be the case for a mature process as it will be smaller than the sum of the individual chips, one saves the interface between them and the latency is lower which helps performance), but you save something on the PCB and cooling solution too, which helps to offset this.
Well if anything Pitcairn is tinier than its predecessors. Tahiti on the other hand bigger.
There was complain actually about the price of those cards (including cap verde).(Actually we don't know how high the yields were and there were shortage which further information could be due to AMD not securing enough wafers, Yields or a blend of both).
But I think it is irrelevant to the quote I gave. There are high yields big chips for sure but it still doesn't discard what KK said.
I know close to nothing about lithography techniques used nowadays, so far ( I asked once) nobody could tell me precisely what is the impact/cost of going with chips bigger than 185mm^2.
Even less if that limitation is still valid.
KK seems to imply that it makes the process more complex, you do more work. it may take longer?
He doesn't speak about yields, I don't think that what he is speaking about is that yield would decrease all of sudden. Those it could be that when you do the second exposure, it is tough to be perfectly align, etc, which would result in a raise in defects per mm^2.
You have to do a second exposure, I don't know how that done, but that indeed seems to imply an extra step, so extra costs by self.
Imho big chip with good yield are irrelevant to his talk.
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THen there are the late Nvidia presentation about raising cost for implementing logic on new process, but may it is PR to explain "things" to investors. I would not discard Nvidia comment without a serious counter argument ( it won't come from a forum, it would take another company pointing the fact that cost are not raising,but are either constant or decreasing).
EDIT
I found some of the slides presented by Nvidia, google is impressive
I did not expect it to return anything significant with the crap I fed it.
link
There are also a couple slides from other sources (not Nvidia) in that article. Imo it doesn't look that good.
The last part of the article seems to imply that industry should give up on big die and try hard to make stacking happen (though it is easier said than done).
Looking at both Nvidia and TSMC slides one may wonder if actually moving from 28nm to 22nm will be a sane option before years (not the couple that we usually had in the console realm, half node shrinks are already a thing of the past).