Next Generation Hardware Speculation with a Technical Spin [post E3 2019, pre GDC 2020] [XBSX, PS5]

Discussion in 'Console Technology' started by DavidGraham, Jun 9, 2019.

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  1. HBRU

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    Silly or not... Will see ;)
     
  2. Shifty Geezer

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    This is supposed to be an intelligent thread with sound, intelligent predictions. Keep random guesswork and silly ideas out of it. A pattern counted from a series of two precursors isn't any pattern at all. Given a complete change in GPU architecture, there are pretty much zero parallels to be drawn from the GCN PS4 series.
     
  3. boipucci

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    Based on Proelite comment
    A 20% area reduction is X*0.8
    435*0.8 = 348
    Because i think maintaining efficiency is important, so that way it will punch above its weight like the 5700
    If you drastically increase the number of DCU per SE it will be less efficient than the 5700.
    Why not? can you elaborate
     
  4. Globalisateur

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    It's 20% higher density, not 20% area reduction. It's not the same. It's actually about 17% area reduction.

    The butterfly structure of RDNA needs (I think) a symmetrical layout (one SE for each sides). How do you do that with 3SE ?
     
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  5. Metal_Spirit

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    Active CU per SE must be odd, right?
     
  6. boipucci

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    Thanks for pointing it out, that went right over my head
    Screenshot_2019-07-04 TSMC Reveals 6 nm Process Technology 7 nm with Higher Transistor Density.png
    But still i think they could bring it closer to 350mm2, there seems to be wasted space on 5700
    Where did you read RDNA needs a symmetrical layout? what do you assume is the benefit of such layout?
    5700XT has 20CU per SE (or 10DCU)
    What matters is each SE has an equal number of DCU (2xCUs)
     
  7. Pixel

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    If I can't convince you maybe Phil can :razz:

    He has clarified that the 4x power statement that its purely CPU related:
    PC Games Hardware: Does the already mentioned statement 4x relate to the performance of the complete console?

    Phil Spencer: No, that's a pure CPU statement. It would also be a little too simplistic to refer to the whole system, as much as I would like to, because so many components flow into it. Take the Xbox One X: In its development, the memory bandwidth was the bottleneck. It had to be big enough to provide content to the GPU without idle time. We could have brought the console to market a year earlier, but we waited another year to get all 6 of the GPU's TFLOPS up and running.

    https://www.pcgameshardware.de/Xbox.../Phil-Spencer-Das-Mega-Interview-1293543/amp/

     
  8. TheAlSpark

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    You'd think it'd be easy to communicate that in the first place. :roll:

    :roll::roll::roll::roll:
     
  9. Globalisateur

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    @Pixel Yes, I know. I was just repeating what Matt Booty (not really a nobody at MS) had said in the Eurogamer interview. Phil clarified it well after that.

    Not my fault if they don't got their stories straight. :roll:
     
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  10. Globalisateur

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    PS5 APU could look like this ?

    [​IMG]
     
  11. milk

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    Too much green. That's more like xbox branding.
     
  12. iroboto

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    In seriousness; what are we looking at? What is the source of this ?
     
  13. Globalisateur

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    Speculation from me based on the reddit 22.4mm by 14.1mm PS5 APU leak.
     
  14. Pixel

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    It is easy :sad: unfortunately we both know this is the marketing game.
    You play loose and fast with numbers, and it makes your product sound better. Sure techies like us see through it, but 99% of the viewers aren't going to know this and it makes the product sound better.

    How is 4x overall performance even quantified? Given (obviously since we follow the semiconductor industry we know they won't be able to put in a 4x more powerful GPU, thus) most XO games won't be running 4x faster or 4x higher resolution or a mixture of the two on Scarlett than XOX unless a game is cpu bottlenecked on XOX and the XOX GPU is at less than 50-60% utilization and you don't get memory bandwidth/ROP bound.
    Since companies are getting loose and fast with numbers, and PR spin is so common, especially in something like an E3 trailer, its never good to rely on vague percentages or vague multiplier claims from execs. Only when pressed do they give up the goods.

    "The new F150 offers 15% more torque than the leading competitor"
    "Freesync doesn't work" - Jensen Huang
    "Fallout 3 will have over 200 endings" - Todd Howard (well yeah if you reeeaaally stretch the definition of what entails an ending really these are just tiny variations on 3 endings)
     
    #474 Pixel, Jul 7, 2019
    Last edited: Jul 7, 2019
  15. BRiT

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  16. Pixel

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    Yes exactly. But 4x cpu perf isn't 4x overall. I referenced those Sebbbi's tweets earlier. I'm saying 4x represents cpu perf not overall perf. Others were saying 4x was "overall" system performance, but how is 4x "overall" even quantified? Particularly when Scarlett won't be capable of running most XO games 4x the resolution/4x the fps*/or a mixture of the two (Since we know the Scarlett GPU won't be 4x (obviously) and will bottleneck games from running at 4x in whatever metric (res/fps), then how can a 4x overall perf be claimed.
    Yes 4x cpu perf, but not 4x 'overall'.

    *if the game/ game engine permit higher fps
     
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  17. Shifty Geezer

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    It's never been possible to quantify how much faster a system is. Do you accumulate the multiplier improvements of each part, or take the highest single improvement, or multiply them all together, or take the lowest single improvement? If you have 2x the RAM speed and 3x the GPU Flops and 1.5x speed the CPU, is the system 1.5x faster or 3x faster or 9x faster or 6.5x faster? As there's no such thing as 'console power' to quantify, we can't thus quantify the 'total improvement'. You'd need a qualified metric to say which aspect is faster by how much.
     
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  18. Proelite

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    Zen cores would be on the left side, not the display engine side. Also needs to have some paths from the GDDR6 controllers to the Zen cores.
     
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  19. boipucci

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    What do you make of a 3 SE config? RDNA2 possibly could be rearranged to accommodate it or just beef up the current 2SEs config with extra cache, rops etc. needed to add 33DCUs (30 enabled)
    Thoughts?

    Also any idea how HBM memory controllers compare to GDDR6 (smaller or bigger?)
     
  20. anexanhume

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    The chances engineering/quality sample silicon was ready and available for dev kits is very slim. We know historically that dev kits with actual production silicon don't show up until the last year before release.
     
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