snc
Veteran
https://www.3dmark.com/fs/19891728
simillar configuration but with rx5700xt slightly higher clocked (9.3tf)
simillar configuration but with rx5700xt slightly higher clocked (9.3tf)
https://www.3dmark.com/fs/19891773
ryzen 3700x base clock 3600mhz boost underclocked to 3200mhz
rx5700xt 1749mhz (8.95 tf)
20208 firestrike overall score (gonzalo is also above 20k with 8c zen2 3.2ghz and navi10gpu 1.8ghz)
With same exact CPU : 0.4 tflops of diff give only a difference of 62 in the result. Gonzalo could be 11 tflops and would still score in the low 20k+ range.https://www.3dmark.com/fs/19891728
simillar configuration but with rx5700xt slightly higher clocked (9.3tf)
Overallscore for firestrike is problematic but I think 11tf would be 21k+With same exact CPU : 0.4 tflops of diff give only a difference of 62 in the result. Gonzalo could be 11 tflops and would still score in the low 20k+ range.
Well, that shows that 8 ryzen cores and a 5700 equivalent clearly can end up in a reasonable ballpark power wise. Nice job, whoever did it.
Yeah that seems like a pretty realistic setup / simulation.
For while there i was all excited about next-gen consoles, but with hard data like this i feel like the (realistic) possible designs are really narrowing in.
I mean we might still get one console on HBM vs GDDR, but i dont think so
I would love think we'll get more CU's - even if it's at a slower speed, but again dont think so.
The simulated console would make nice upgrade from a base PS4, and decent bump for Pro,
but nothing like the days of old with even 8x Flop upgrades, let alone more.
(1.89 --> 9.x ... more like 5 or 6x )
Oh well, games will still be awesome, and i will have not enough time to play them.
One problem, what about the references to dedicated raytracing hardware, IIRC in both next Xbox and PS? 5700XT doesn't have this...
Myself I'm skeptical next gen consoles will truly include dedicated RT hardware anyway though. Maybe a software solution, at which point they can claim any old CU is "dedicated hardware"
7nm dies are too expensive apparently. That gen won't be wide and slow IMO like it was for previous gen. I think they'll put more design into the cooling solutions: like more copper, vapor chamber, graphite pads, hovis method (not cooling but related to use smaller dies clocker higher) and such.Next-gen consoles will either be based on current gen Navi ie. 5700XT or similar, or the next version of the RDNA architecture, and based on what we know about AMD's GPU roadmap, and pace of development
I think it is reasonable to make this "simulation", and that it's findings are valid. More than anything we are power limited in consoles these days, so this "simulation of zen2 arch @ certain speed and power usage, gives us a good window into what is possible on the GPU side. Even if we get a 2nd gen RDNA arch. It still has to sit in pretty much the same power envelope, and it's performance aint gonna change more than 10% either way, ( perhaps ignoring the hardware RT stuff..)
IMHO, at least 1 next-gen console will have 2nd gen RDNA architecture, which in turn WILL include some form of HW raytracing, however the "raytracing HW" in question will be less dedicated than nvidia, and more able to make use of existing compute/GPU resources.
All speculation, but at least partly based in technical reasonaing...i hope.
Meh HOPE! I hope for as 2nd gen RDNA Arch. but in a full size impl, with 60 CU's enabled, and running at a low enough clockspeed to make it still come in @ 200W.
maybe that more like dream, than hope!
Let me inject some data here. While pricing per wafer is hard to come by, and likely depends a bit on the specific chip (number of exposures) and of course volumes, current pricing seems to be just over $5000/wafer for TSMC 16/12nm and ”just under $10000/wafer” (I’d ballpark it at $8/9000 or so for a 10000 wafer order) for TSMC 7nm. Again, at this point in time, as cost per wafer typically drops at a somewhat exponential rate after introduction. Also if you come in with a large order (say 300000 wafers) and stretched over time, that should affect pricing downwards as well.7nm dies are too expensive apparently. That gen won't be wide and slow IMO like it was for previous gen. I think they'll put more design into the cooling solutions: like more copper, vapor chamber, graphite pads, hovis method (not cooling but related to use smaller dies clocker higher) and such.
XBX can be seen as the start of that pattern. Few CUs (comparatively to Pro) clocked rather high
300mm2 is small, ps4 was 348 and xbox one 363, xox 359Let me inject some data here. While pricing per wafer is hard to come by, and likely depends a bit on the specific chip (number of exposures) and of course volumes, current pricing seems to be just over $5000/wafer for TSMC 16/12nm and ”just under $10000/wafer” (I’d ballpark it at $8/9000 or so for a 10000 wafer order) for TSMC 7nm. Again, at this point in time, as cost per wafer typically drops at a somewhat exponential rate after introduction. Also if you come in with a large order (say 300000 wafers) and stretched over time, that should affect pricing downwards as well.
Then you need to estimate the number of dies per wafer, and for a ballpark estimation you can use a calculator such as this.
Yeilds will tend to improve over time, and you would also design a big console chip with redundancy, for instance only using 7 out of 8 cores, or 44 out of 48 CUs or some such to mitigate the impact of defects.
Altogether, the raw silicon cost for a 300mm2 die should be in the ballpark of $60, with some liberal error bars given that the production will be in 2020 and forward and not a few months ago where my pricing information for TSMC 7nm is from.
Actually they published a PR graph where people sloppily read the difference as a factor of two whereas I you actually bother to look it's more like 1.75ish. Which is actually probably pretty accurate at the moment. But I would caution everyone to remember that all numbers we have and are likely ever to get are quite rough. Actual costs are influenced by a large number of factors - size, defect density, production maturity, redundancies in the designs, bargaining power which in turn depends on a number of factors, the competitive landscape vs. Samsung and in the fab supply chain and so on. ANY estimation is to be taken with liberal helpings of salt.AMD have said that a 250mm^2 7nm chip yielded is twice the cost of a 250 mm^2 14/16nm chip yielded. TMSC have said 7nm defect rates are very close to 16nm and 7nm ramp has basicilly been the best they ever had.
So really we are probably only talking ~$30USD extra at 250mm, probably like 60-70 USD extra @ 350mm, thats today not next year.
SoCs aren't just wafer cost. Packaging, assembly, and test are all significant operations. I'm assuming the cost of dicing is included in wafer cost, but perhaps not.If this 7nm calculator is somewhat accurate, I have multiple questions as to why both TechInsight, IHS and a few other bill of material breakdowns in November 2013 had TSMC's 28nm planar process (plus I'm guessing AMD's royalty) costing Sony & MS over $100 per SoC (I'm sure they factored in economies of scale and I'm guessing they factored in an estimated AMD royalty).
Kinda confirming the expense of the hardware 2 months before PS4 launch Sony Computer Entertainment senior vice president Masayasu Ito they are selling the console at a loss but will easily recoup that loss. VP is possibly factoring in insuracce shipping expenses, retailers slim margins, etc though we don't know for certain...
(but that still kinda confirming that component expenses were in the ballpark of those BOM estimates)
https://www.geek.com/games/sony-wil...ily-recoup-it-in-games-ps-plus-sales-1571335/
Thanks, I had just assumed all of that was included.SoCs aren't just wafer cost. Packaging, assembly, and test are all significant operations. I'm assuming the cost of dicing is included in wafer cost, but perhaps not.
Since you seem interested, you can compare with Techinsights analysis of the iPhone Xs, which was the first major 7nm product. At the time wafer cost was roughly $12500 and the die calculator gives just over 600 good dies. Lets assume 500 since it was the first on the node. 12500/500=$25 per silicon chip. Add packaging and testing and discarding a few more and you get very roughly $30 per SoC. Techinsights state $72 for SoC+modem+modem fees. (Observe - there is no way in hell they actually know that number with that precision, they are using estimates) which would peg the SoC at $40 or so.Thanks, I had just assumed all of that was included.