itsmydamnation
Veteran
So how much do you think the cost is?
How much for the R&D for the Tensor core?
How much for the end to end development of the SOC?
How much for the software development of the failed feature?
Pricing Discussions around AMD VEGA *over-flow*
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How much for the R&D for the Tensor core?
How much for the end to end development of the SOC?
How much for the software development of the failed feature?
Well V100 is mostly already paid by Summit and Sierra super computers contracts announced 3 years ago, so financial risk is very minimum when you have this kind of governmental leading customer...
DavidGraham
Veteran
That's highly unlikely, due to the conservative nature of the pro line, it's base clock is 200Mhz lower base than Vega FE, it's max clock is also lower, it has a different cooler and different power requirements (pro only has 6+8 pin power connectors). So I am quite sure it's typical clocks will be lower.
if its a flop i really doubt that they will get them
What does that mean?
It's easier to reach peak compute performance than it is to reach peak graphics performance, so meeting the required specifications should be pretty low risk.
If two supercomputer contracts have already been lined up, and a decent chunk of revenue along with it, what could be a flop?
The risk profile seems inverted. The real pain doesn't come from the uncertainty of finding customers, but what happens if you burn those contracted customers.
Nvidia's contorted itself out of its normal behavior a fair amount for Volta, given the way it is rolling out the product, the die size, and timing of the node.
The cost in reputation and other penalties reminds me of what happened with AMD having to release Bulldozer at the time it did. Actually, if I recall correctly, I think it also applied to Shanghai.
Cray was the partner that got burned (or at least singed) twice, and at least some of AMD's being shoved out of that space is probably attributable to that. The repercussions likely continue to this day, since Cray sold its high-performance interconnect group to Intel a number of years ago, and that isn't something AMD has an in-house answer for presently.
D
Deleted member 13524
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So after 22 pages and 3 weeks, the post-launch mortem result is that several of the largest e-stores are selling the stand-alone Vega 56 at MSRP and the Vega 64 at very close to MSRP.
OCUK is selling the Vega 64 for £20 over MSRP, for example.
Furthermore, it seems a number of german and british e-stores are now giving away the game codes to people who bought any Vega card - stand alone or pack. Could be a mistake among store employees though.
OCUK is selling the Vega 64 for £20 over MSRP, for example.
Furthermore, it seems a number of german and british e-stores are now giving away the game codes to people who bought any Vega card - stand alone or pack. Could be a mistake among store employees though.
I don't see anything in Volta that's not a natural progression of what happened before, TBH.
GK110 was first rolled out for the Titan supercomputer, I think? GP100 for some other whose name I can't remember. GV100 is no different.
Die sizes have been going up for a long time. And the node isn't very aggressive, a tweak of a pretty mature one?
I don't recall the limited roll-out method Nvidia is using for Tesla systems outside of the supercomputers (clarification: the limited direct sale of Nvidia systems), but that may be my faulty memory.
The 800mm2 reticle limit is new and likely claws back some of the incremental nature of the node, and the 12nm FFN node is noted as being customized for Nvidia. Nvidia may have lacked faith in getting a more traditionally sized 10nm or less in time with the promised deliverables. Going for a foundry-leading feature and an individualized node seems like this is a new tier of attention for GV100.
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I don't think Tesla P100 was released with a specific super computer in mind. It was a backup plan for the Summit and Sierra if V100 would not be ready. But it obviously is. It's also not that these two supper computers were planed around tensor cores and AI. It will sell to other clients because of that though.
I don't see how NV contorted itself out of its normal behavior though. If anything the cadence of graphics and compute designs may be getting a bit further apart then they currently are. With the larger gap between compute Volta and gaming Volta I think we might get a larger difference there this time around then we did with Pascal.
I can't speak for Europe, but here in the US there aren't and haven't been any Vega 64s for sale for under $599.
https://www.nowinstock.net/computers/videocards/amd/rxvega64/
Looks like they're still selling only the Pack-versions there (AMD even added that "Red Pack" option officially in some point, aka $100 for "2 free games")
The reticle is only around 30% larger than before. Maybe that has an impact on packaging, but from a pure core die production point of view, I don't think it's a big deal?
Is there any known information about this node other than that it exists and that the density is very similar to regular 16nm?
The Piz Daint supercomputer in Switzerland was its first beneficiary, but I think that you're right about it not being specifically targeted for it.
The max reticle held relatively steady in the ~630mm2 range for multiple nodes, and it took some specific dimensions to reach it.
At least for the foundries, it was less likely to be pushed. Intel and IBM pushed things closer, and I think Intel edged above it in its own fabs recently.
Globalfoundries is marketing a bump to ~700mm2 for its future node, which I think has to do with IBM's influence.
The tools weren't there until recently, and immediately going for the max with Volta is where Nvidia could be taking a yield hit despite not waiting for 10nm or better.
I haven't seen a consistent description, although Nvidia is stating in its blog that GV100 is on a node customized for Nvidia.
AMD claimed similar, albeit with a bit more detail, for the GF node used for Carrizo.
NV has always been very cozy with TSMC, that probably has a lot to do with it. Presumably, the two companies would work closely together to make manufacturing of such a huge die work, commercially.
Having such a flagship product is also quite the feather in TSMC's cap, to show off their capabilities. Perhaps NV is getting a sweeter than usual deal on their wafer purchases.
Presumably, TSMC wouldn't be doing this to make less money from Nvidia, which puts GV100 in a corner where manufacturing was insufficient at 16FF+ to get the necessary perf+features per unit, but also found Nvidia not waiting for what would at least in theory be a bigger jump in density and efficiency with 10nm.
For now, GV100 seems unique in its demand for that die size.
At least for GV100, it's being sold in full systems in the >$100K range, which a volume and pricing corner like a comparatively pricey Power system--which is compensating for silicon that is knowingly pushing the edge of manufacturing.Having such a flagship product is also quite the feather in TSMC's cap, to show off their capabilities. Perhaps NV is getting a sweeter than usual deal on their wafer purchases.
That's what I thought until I started looking for it. And it turns out that steppers have been at 26mm x33mm for a long time now.
See for example this presentation from 2001:
http://www.eng.utah.edu/~gale/mems/microlithtexred.pdf slide 20.
It would appear that there are confounding factors, such as reaching practical limits along one dimension of reticle. If the steppers have been able to support a maximum exposure of 26x33mm, it is something the foundries still were not able to offer for ASICs. GF's promised reticle expansion would presumably have come despite steppers having that field size.
The ability to provide quality exposures in volume may have been influenced by the tolerances on future nodes, which would go to 300mm and also finer geometries than in that slide. The wafers per hour throughput in the table seems low, with articles on TSMC's EUV plans hoping for at least 100 wafers/hour as the acceptable standard, which may also be a difference.
