Yes, I see. Initially, I was not thinking along the lines of an interposer but maybe what can be described as a MCM-on-die.
A passive silicon interposer is like an upper layer of metal without the complexity of an active layer or a lot of local connection complexity. Its behavior across a stitch boundary would be analogous to what would happen if metal layers in a GPU had to make a similar connection across a die boundary.
Stitching like the interposer or sensors looks like it might be possible, but each layer of connections would have lower wire density due to needing physically massive feature sizes relative to what the GPU's internal regions are using.
2.5D integration trades off area density in the mounted chips for PHY and bumps, but at least that lets the interposer's 65nm wire pitch carry many more signals horizontally between regions.
I'd speculated about die stitching in this manner before, but if those density numbers are applicable it may explain why it hasn't been pushed. Getting enough thick metal layers to get comparable bandwidth or creating an on-die high-speed interface that acts like an off-die one, appear counterproductive.
Some other form of region-crossing would have to be implemented that differs from this method.
Non-connected methods like capacitive coupling or some kind of RF link have coarse area requirements, which in this case could become prohibitive as they would need to fit along a die edge and have the Z-height of the chip as their pad space.
I've thought about some kind of directed self-assembly or other method of growing connections, but that would be extra manufacturing after all the rest of the GPU silicon was done and that kind of tech is still discussed in the future tense.