Well, exactly. The longer they put it off, the better the chances of cheaper, higher density or faster DDR4. Didn't people want their 8GB consoles to actually be feasible??
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It's not so much a question if it'll exist, but whether it will be ready for mass production. Early adoption of the process won't be cheap - far from it as capacities will be constrained and as it'll take time to get better yields.
Speaking of mature process, I wonder where will be IBM 32nm process enabling DRAM.
Some pages ago I was fantasizing about the odds of many cores design, after reading more about about POWERPC A2 and about IBM expectation for DRAM @32nm (they expect better result than at 45nm) it sounds a bit less like one's geeky/wacky speculation.
I don't expect Sony or MS to use something else than 32/28nm processes for their next gen design as I don't believe that either TSMC or GF will have properly transitioned to better processes by the time next gens launch (especially if you consider that they may want to start production x months before release).
I think it's possible to come up with something competitive as long as IBM find some interest in founding the project a bit. Is there a market for a more "number crunching" orientated power A2? I'm not sure.
Would Sony take the risk to move to such a architecture? Imo after the losses on the ps3 and their last statements on the matter I believe there is no way. For MS? It's possible but I would put the odds pretty lows. Ms is tied to directx evolutions but say directx 12 is still not completely defined or there is no compliant part ready for launch a many-cores backed by a
tiny directx11 class "ROP/RBE less" GPU(s) with support for tiling may do the trick.
The programming model could be:
everything from scene traversal to vertex handling is done on throughput cores.
Data is read on fly by GPU(s) on board from L2.(dumping in RAM if necessary).
GPU(s) does its stuffs, rasterize, texture, fill render target write tiles somewhere on the L2 (dumping in RAM if necessary).
Throughput cores read tiles of the RT, do deferred shading, post process operations, etc.
results are write back to RAM and sent to display.