Details trickle out on CELL processor...

PC-Engine said:
SONY fanbois wetting their panties over the prospect that the infamous 4GHz 1TFLOPS 32MB eDRAM sub 300mm^2 CELL cpu technology going into competing consoles should just relax... :LOL:

ATI's gpu going into the competing consoles will rip PS3 a new one regardless... ;)

Thanks for that PC-Engine. :rolleyes:
 
Brimstone said:
McFly said:
Cell will defenitly not end in Xenon and Revolution, that's just wishful thinking from MS or Nintendo fanboys. The only way cell could end in Revolution is if Nintendo goes software only and Revolution is just a Nintendo branded PS3.

Fredi

The way I understand it, CELL is just a code name, not a technology IP.

How about the PU ends up in Xenon's CPU (albeit maybe an older revision and in 90 nm and not 65 nm, hence why the 3.5 GHz comment) and then they get the revised VMX unit from the PowerPC 970 CPU.

Xenon CPU would be, theoretically, something like this: 3xPUs + 3 VMX units.

PlayStation 3 CPU/Broadband Engine would then be something like this: 1-or-2xPU + 8 APUs (or you can call them SPUs, but by both achronims I mean the same kind of unit) + custom Rambus technology.

Revised VMX != APU.

Also Xenon's CPU will be not be as much of a DMAC-centric design as IMHO PlayStation 3's CPU will be as it was PlayStation 2's CPU the EE.

This is the theory that makes the most sense to me.
 
Just a simple comment I have. Considering the amounts of investments STI needed to pour into the fabs alone, if any other party needs to pay $x to obtain and manufacture n units, Sony can produce 3*n units with the same $x. (Hypothetically speaking of course.)

So it's a pretty bad idea for a competitor to compete in that manner.

Besides, in an interview posted at Ars, the POWER members actually don't know what the CELL members are doing, further illustrating that it is probably likely that in the same way, the Revolution/Xenon/CELL teams don't know what the other is doing.

Besides, my opinion(maybe the opinion of some others here?) is that a CELL chip is, shall we call it, a functional evolution/power-up of the VUs in the PS2. I doubt it will fit well in the context of the 'conventional' ATI design approach.

BTW,
ANY CRIES OF ANGUISH FROM THE DEVELOPER COMMUNITY YET?
 
passerby said:
Besides, my opinion(maybe the opinion of some others here?) is that a CELL chip is, shall we call it, a functional evolution/power-up of the VUs in the PS2. I doubt it will fit well in the context of the 'conventional' ATI design approach.

The leaked (if real) diagram for the xbox 2 shows vertex shaders on each core. The idea being geometry gets created on the cpu core(s) and all the pipes on the R500 concentrate on pixel shading. If a developer wants to strain the cpu cores for other things besides generating geometry(physics, A.I.,), they can have the gpu do vertex and pixel shading, of course decreasing pixel shading power. Having a few SPU's per core would seem to fit that situation.
 
PC-Engine said:
SONY fanbois wetting their panties over the prospect that the infamous 4GHz 1TFLOPS 32MB eDRAM sub 300mm^2 CELL cpu technology going into competing consoles should just relax... :LOL:

ATI's gpu going into the competing consoles will rip PS3 a new one regardless... ;)

You're just funnie to read. :LOL:
 
Just read this over at Ars,

Interestingly enough, published reports claim that Cell will use the POWER ISA, and not the PowerPC ISA. I'm not 100% sure what this signifies for the Cell, and I'd like to see readers' thoughts on why IBM picked POWER over the PPC subset. What do the differences between the two ISAs tell us about what we can expect from the Cell? Update: A reader in the know has clarified for me that IBM's marketing folks are now using "POWER architecture" as more of a catch-all for the entire family of POWER derivatives, and not just the original POWER ISA. So it doesn't necessarily mean anything that the news reports say "POWER-based" and now "PowerPC-based."

http://arstechnica.com/news.ars/post/20041129-4421.html

So it's still Power or PowerPC based for the Cells PUs then? Is there a difference between Power and PowerPC that would make one more beneficial than the other for Cell?
 
There isn't anything useful in the program I'm afraid. Its just times of various things, whats in the conference proceedings, brief synopsis of presentations, etc.

Edit: Or we just looking for something they are going to present?

Edit 2: 7.4 Page 29

7.4 A Streaming Processing Unit for a CELL Processor
3:15 PM
B. Flachs(1), S. Asano(2), S. Dhong(1), P. Hofstee(1), G. Gervais(1), R. Kim(1) , T. Le(1) , P. Liu(1), J. Leenstra(3), J. Liberty(1), B. Michael, S. Mueller(3), O. Takahashi(1) , Y.Watanabe(2) , A. Hatakeyama(4),H. Oh(1), N.Yano(2)

1 - IBM, Austin, TX
2 - Toshiba, Austin, TX
3 - IBM, Boeblingen, Germany
4 - Sony, Austin, TX

The design of a 4-way SIMD streaming data processor emphasizes achievable performance in area and power. Software controls data movement and instruction flow, and improves data bandwidth and pipeline utilization. The micro-architecture minimizes instruction latency and provides fine-grain clock control to reduce power.

Edit 3: On Page 36

10.2 The Design and Implementation of a First-Generation CELL Processor
9:00 AM
D. Pham(1), S.Asano(2),M. Bolliger(1), M. Day(1) , H. Hofstee(1), C. Johns(1) , J. Kahle(1) , A. Kameyama(3) , J. Keaty(1),Y. Masubuchi(2), M. Riley(1), D. Shippy(1), D. Stasiak(1) , M.Wang(1) , J.Warnock(1), S.Weitzel(1), D.Wendel(1) , T.Yamazaki(1) , K.Yazawa(2)

1 - IBM, Austin, TX
2 - Sony, Tokyo, Japan
3 - Toshiba, Austin, TX

A CELL Processor is a multi-core chip consisting of a 64b Power architecture processor, multiple streaming processors, a flexible IO interface, and a memory interface controller. This SoC is implemented in 90nm SOI technology. The chip is designed with a high degree of modularity and reuse to maximize the custom circuit content and achieve a high-frequency clock-rate.


Edit 4: This one isn't Cell per say but prolly related on Page 60

20.1 An 8GHz Floating Point Multiply
8:30 AM
W. Belluomini, D. Jamsek, A. Martin, C. McDowell, R. Montoye,
T. Nguyen, H. Ngo, J. Sawada, I. Vo, R. Datta

IBM, Austin, TX

The implementation of the mantissa portion of a floating-point multiply (54x54b) is described. The 0.124mm2 multiplier is implemented using limited switch dynamic logic and operates at speeds up to 8GHz in a 90nm SOI technology. The multiplier dissipates between 150mW and 1.8W as it scales between 2GHz and 8GHz.

This one though is on the same page

20.3 A Double-Precision Multiplier with Fine-Grained Clock-Gating Support for a First-Generation CELL Processor
9:30 AM
J. Kuang(1), T. Buchholtz(2), S. Dance(2) , J. Warnock(3), S. Storino(2), D. Wendel(4)

1 - IBM, Austin, TX
2 - IBM, Rochester, MN
3 - IBM, Yorktown Heights, NY
4 - IBM, Böblingen, Germany
A double-precision multiplier for a 90nm SOI CELL processor is presented. Dynamic Booth logic is designed for scalability and with noise, leakage, and pulse-width variation tolerance. Static partial-product compression is implemented with replicated bits for performance. The design supports fine-grained clock gating domains for active power reduction.

Edit 5: Page 73

26.7 A 4.8GHz Fully Pipelined Embedded SRAM in the Streaming Processor of a CELL Processor
4:15 PM
T. Asano(1), T. Nakazato(2), S. Dhong(3), A. Kawasumi(2), J. Silberman(4), O. Takahashi(3), M. White(3), H.Yoshihara(5)

1 - IBM, Yasu, Japan
2 - Toshiba, Austin, TX
3 - IBM, Austin, TX
4 - IBM, Yorktown Heights, NY
5 - Sony, Austin, TX

A 6-stage fully pipelined embedded SRAM is implemented in a 90nm SOI technology. The array uses a conventional 6-transistor memory cell and sense amplifier to achieve the cycle time while minimizing the impact of device variation. A sum-addressed pre-decoder allows partial activation for power savings.

Edit 6: Page 77

28.9 Clocking and Circuit Design for a Parallel I/O on a First-Generation CELL Processor
4:45 PM
K. Chang(1), S. Pamarti(1), K. Kaviani(1), E. Alon(1),(2), X. Shi(1), T. Chin(1), J. Shen(1), G.Yip(1), C. Madden(1), R. Schmitt(1), C.Yuan(1), F. Assaderaghi(1), M. Horowitz(1),(2)

1 - Rambus, Los Altos, CA
2 - Stanford University, Stanford, CA

A parallel I/O is integrated on a first-generation CELL processor in 90nm SOI CMOS. A clock-tracking architecture suppresses reference jitter to achieve 6.4Gb/s/link operation at 21.6mW/Gb/s. SOI effects on analog circuits, in particular high-speed receivers, are addressed to achieve a receiver sensitivity of ±12mV at 6.4Gb/s with BER <10-14 measured using 7b PRBS data.

Edit 8: I think thats all of them and just made things look nicer
 
Nothing really new to learn looking at all those else than confirmation it has a Power archictecture processor somewhere, it has SRAM, and each link will be 6.4GB/s.
 
Yeah, definately a good idea using all those names for patent searches. Heh, no time to do that now myself but will be interesting to see the results later.
 
I just can't see IBM cutting that type of deal.

Why would Sony go exclusive with Sony and Toshiba? They already had Nintendo from the Gamecube deal. They just wanted to expand and they got all 3 major console players.

I find it almost impossible to belive that IBM would surrender the rights to use and sell IP they have developed over the course of decades, and all the electronic engineering talent they have nurtured over the course of decades just to sign some exclusive deal with Sony and Toshiba.

Since IBM was already working with Nintendo prior to the CELL deal, I'm sure this was cleary on the minds of Sony and IBM. How can IBM make money from CELL unless they can sell it to others like Nintendo and Microsoft? That's a lot of potencial income to give up and have clearly stated the embedded market is the future. Consoles are considered embedded devices and both Nintendo and Microsoft are very wealthy companies.


IBM is hardly getting a "free ride". They plow a lot of money into R&D every year.

Just too add a guess. I don't think the core is a PowerPC core. It's something new. It's a clean sheet design but the roots go back to all the work on previous POWER architechtures, like PowerPC. When I read POWER clearly spelled out on the latest press releases, to me it if falls under the POWER umbrella and IBM can do whatever they want with it. This new Power core will end up in all 3 consoles I feel.

I'm not really sure if you are trying to be funny or not, but if you really believe IBM can just market the Cell to any one of the two competitors (or anyone for that matter), then it's safe to say that you have major issues upstairs. Not only would IBM have a huge lawsuit filed against them by both Sony and Toshiba, not only will Nintendo and Microsoft have another filed against them, but IBM would no longer be a member amongst the two due to patent infringement and failure to remain exclusive. Between the three members, no one firm owns the Cell. It is a team effort with all three members holding patents to a specific part of the archchitecture. IBM or Toshiba marketing the Cell to others can only be done through the patents inwhich they hold exclusively to themselves for that architecture. If I remember right, I believe the agreement was to market the Cell in exclusive consumer devices (as in being owned by one of the three members: STI). It's ok to dream sometimes, but what you're saying is absurd.
 
CELL won't appear in any other consoles. To think so is just plain stupid. Toshiba, Sony and IBM are in this to create a product that's mutually beneficial. IBM turning around and selling the same tech to MS or Nintendo would hurt Sony, so I don't see it happening....ever. It's not a fanboy defense, this is just common sense. If we've thought of it, high-priced lawyers already took care of it months/years ago. PEACE.
 
MechanizedDeath said:
CELL won't appear in any other consoles. To think so is just plain stupid. Toshiba, Sony and IBM are in this to create a product that's mutually beneficial. IBM turning around and selling the same tech to MS or Nintendo would hurt Sony, so I don't see it happening....ever. It's not a <bleep> defense, this is just common sense. If we've thought of it, high-priced lawyers already took care of it months/years ago. PEACE.

that is true cell wont be in any other console. That doesn't mean that some of the good ideas in cell wont be in the other consoles . Ibm would not have invested this much money unless the design wins would be used in other tech

How much will have made it into other chips really depends on when those other chips were designed . I highly doubt the xenon will have any of the benfits of the bluegene / cell reserch but perhaps the nintendo console might have some tech in it .
 
nAo said:
CELL and Xenon CPU share at least one researcher

Heh, there are some interesting patents linking off of his page. Like this - it looks like a very early Cell patent (filed before the project was even announced):

Here

There are some other interesting ones too..

Was this stuff looked at here before?
 
nAo said:
Yeah..of course :)
I believe there isn't a single relevant patent we missed..

Haha, I thought so. I'm not as well up on "where we are" with patents. I'm aware of the most widely reported ones, but there seem to be a lot more! Thanks.

edit - hehe, Beyond3D needs a subscription to this website (if someone here hasn't got one already!): http://www.delphion.com/
 
Back
Top