I saw this pop up a lot during our stream yesterday, that the driver isn’t meant for gaming so it hasn’t been optimized for gaming. Instead, it’s only targeting “professional” level applications. First, that’s not the case and AMD has confirmed that. The driver has all the gaming optimizations that the other Radeon drivers would include up until at least the driver branching mentioned above. After that time, optimizations may or may not have made it in, as AMD tells it.
The one caveat to this is that the Vega architecture itself is still unoptimized in the driver. But this would affect gaming and non-gaming workloads most of the time. So if the driver isn’t ready for ANYTHING, then that’s a valid concern, but it applies to ALL workloads and not just games.
Edit: The power draw doesn't look pretty:
It's going to be one of those cards again where reducing voltages actually improves performance. Depending on your luck of course.
- Die size: 27.85mm x 20.25mm (GPU only, not including memory stacks)
- Area: 564mm2
- Package size: 47.3mm x 47.3mm
- Area: 2,237mm2
This is just baffling. Something just isn't right here. Where did all the transistor budget go?Can that chip area be double-checked?
Fiji is 593mm2.
Kind of weird how close the area gets to Vega if it just "lost" two HBM interfaces. Where'd all the area savings from 14nm go?
The marked rectangle in your last picture includes quite a bit more than just the GPU die on the sides.I placed the photo in Krita, resized the card to line up with the ruler at 267mm, and the chip looks to be about 28mm by 20mm putting it at 560mm^2.
PCPer's measurement appears to be accurate.
Why is the Fury X so efficient?
Why does it need so much power?
The marked rectangle in your last picture includes quite a bit more than just the GPU die on the sides.
Edit: it's about 1.7mm too wide and a few pixels to high, too, which would make it 26.3 x 19.9 or something.
Cache?Can that chip area be double-checked?
Fiji is 593mm2.
Kind of weird how close the area gets to Vega if it just "lost" two HBM interfaces. Where'd all the area savings from 14nm go?
Something is clearly wrong.