RDNA4


Yea it looks vastly simplified which hopefully makes it easier for the driver team to optimise for so they can extract more from the units. I also presume the hardware itself is more capable.

There just is not enough to go on to translate that into performance. I presume the intent is to shift the raster/RT ratio a bit so even if N48 is closer to 7900GRE in raster on average in RT it will be more faster than that but I feel that is a trivially obvious goal for AMD to have and what really matters is magnitude of improvement.
 
Im sure AMD will push Navi 44 and Navi 48 mobile GPUs with Strix/Fire Range though?

Although I am very curious as to why Strix Halo wasn't planned with RDNA 4 IP instead of 3.5, given that the timing is Q1'25 anyway.
No.

No they aren't.

That's very-very dead.
The next stop is Medusa, in 2026.
Would that be some RDNA 4.5 variant? Doubt RDNA5 would be ready in time for integration in products by Q1'26 (Assuming launch of Zen 6 at CES)
 
Im sure AMD will push Navi 44 and Navi 48 mobile GPUs with Strix/Fire Range though?
Doesn't mean they're gonna win any slots.
Not after what they've done with RDNA3.
Although I am very curious as to why Strix Halo wasn't planned with RDNA 4 IP instead of 3.5, given that the timing is Q1'25 anyway.
It slipped, just like Strixes themselves did.
Would that be some RDNA 4.5 variant?
5.
Only the OG krakens were RDNA4.5, those are very-very dead.
Doubt RDNA5 would be ready in time for integration in products by Q1'26 (Assuming launch of Zen 6 at CES)
Oh it starts in APUs.
 
Doesn't mean they're gonna win any slots.
Not after what they've done with RDNA3.
True, even RDNA2 barely managed to gain any mobile marketshare, despite being better perf/W than Nvidia. Even Asus pretty much skipped RDNA3, though I'm sure there will be one or two AMD Advantage models this time around as well.
It slipped, just like Strixes themselves did.
Ahh shame, would have certainly been quite the combination. Hoping they continue the Halo model with Zen 6 as well
Oh it starts in APUs.
Interesting, and definitely good news for the APUs which finally get fully caught up to the latest GPU IP.
 
even RDNA2 barely managed to gain any mobile marketshare
Bull, it gained plenty, see mobile unit reporting from the likes of JPR for 2022.
Ahh shame, would have certainly been quite the combination.
Yeah Strix definitions were a soap opera.
Interesting, and definitely good news for the APUs which finally get fully caught up to the latest GPU IP.
Ughhh I mean we all tend to forget Phoenix but it was the newest gfx IP for the APU.
 
Bull, it gained plenty, see mobile unit reporting from the likes of JPR for 2022.
I was going off the numbers in the Steam Survey. Couldn't find any particular results for JPR which showed an increase in 2022. The one I found actually showed a decrease - https://www.jonpeddie.com/news/adjustment-to-q422-jpr-dgpu-market-report/ Please link to a relevant article if you can.
Ughhh I mean we all tend to forget Phoenix but it was the newest gfx IP for the APU.
Oh right! Totally forgot about PHX1. Well hopefully they can keep the IPs in sync going forward.
 

The ability of these guys to create entire articles out of 3 word forum posts is truly impressive.

This would be a good time for AMD to amp up their RT game but not sure how much progress they can make with RDNA 4 skipping the high end. It would be encouraging to have something exciting in the midrange though - e.g. matching or surpassing Navi 31 in CP overdrive.
 
This would be a good time for AMD to amp up their RT game but not sure how much progress they can make with RDNA 4 skipping the high end.
Remember that the core IP isn't tied to any specific part in mind.
Also it's not really skipping it.
Things got canned.
In the name of all that is Good and against all that is Bad.
 
Remember that the core IP isn't tied to any specific part in mind.
Also it's not really skipping it.
Things got canned.
In the name of all that is Good and against all that is Bad.
I really do wonder though, how much extra effort would it have been to simply make Navi 48 straight 50% bigger and remain monolithic, 384 bit and 48 WGPs. Die Size would have been ~350 mm2 so not outrageous, and TSMC seemingly has spare wafer capacity on 4nm. Wouldn't have been a halo part still a good step up from 7900 XTX.
 
The ability of these guys to create entire articles out of 3 word forum posts is truly impressive.
That's the problem with modern media - it's driven by clicks and algorithms, and mass of content. To be discoverable, you need to attract the Algorithms' attentions. If you want to be valid and top search results, you have to make a story out of anything. Us long-term users of Eurogamer have been expressing our disappointment over their content as it's slid down the years towards this sort of activity. Half the news is just skimming other news.

We have to take everything with a cup of salt of now. A lot of information goes "rumour > echo chamber > public knowledge" with no safeguards or sanity checks. It's more important than ever for the individual to handle the information gathering, processing, and research to have a chance at a decent understanding.

Edit: And the joy of a good discussion forum is we can share our understanding and informing sources and have a chance to come up with a more balanced view! More samples will tend towards ground truth.
 
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Not that.
Completely unrelated is the word.

Which does make it impossible to take a reasoned guess at, far too many unknowns and speculation is rife with unknowns anyway.

Just to minimize the impact of RTRT on perf.
You still have core PPA targets to adhere to, tho.

minimise the impact / improve performance are essentially two sides of the same coin. If the average performance loss of turning RTRT on was 50%* on RDNA 3 and this drops to 40%* on RDNA 4 then that means more FPS in RT relative to the baseline raster FPS.

*Those numbers are there to illustrate an example rather than as any kind of guess / prediction or claim.

Edit: And the joy of a good discussion forum is we can share our understanding and informing sources and have a chance to come up with a more balanced view! More samples will tend towards ground truth.

Not so sure more samples always helps. If all the samples provided are outliers or just plain incorrect due to an unknown to them complication then it won't get close to the truth. None the less it is still fun to chat about and as you alluded to in an earlier post until we have benchmarks nobody really knows how it will shake out. Even if AMD released a full spec with clockspeeds without any benchmarks it would still be a guessing game as to how it will perform.
 
I really do wonder though, how much extra effort would it have been to simply make Navi 48 straight 50% bigger and remain monolithic, 384 bit and 48 WGPs. Die Size would have been ~350 mm2 so not outrageous, and TSMC seemingly has spare wafer capacity on 4nm. Wouldn't have been a halo part still a good step up from 7900 XTX.
I think they actively want to avoid these RDNA4 parts from being viewed as any kind of 'high end' parts, a segment they'll address with RDNA5 (hopefully) next year.
 
This would be a good time for AMD to amp up their RT game but not sure how much progress they can make with RDNA 4 skipping the high end. It would be encouraging to have something exciting in the midrange though - e.g. matching or surpassing Navi 31 in CP overdrive.
As long as they can show a significant improvement in heavy RT workloads compared to similarly configured RDNA3 GPUs it's good. Something like >=1.5x FPS in Cyberpunk using the second highest RT level (psycho? the non-overdrive mode), maybe slightly more if the rasterisation improvement is also good. Obviously FPS =/= actual RT improvement and can underrepresent it but that's a good starting goal
 
Chiplet-based GPUs would need CoWoS packaging. CoWoS capacities are limited, so it makes sense to use all the reserved capacities to manufacture high-margin products ($x0 000 accelerators) instead of low-margin ($x00) gaming GPUs.
 
I think they actively want to avoid these RDNA4 parts from being viewed as any kind of 'high end' parts, a segment they'll address with RDNA5 (hopefully) next year.

Yeah it’s shaking out like another “big Navi” situation.

Chiplet-based GPUs would need CoWoS packaging. CoWoS capacities are limited, so it makes sense to use all the reserved capacities to manufacture high-margin products ($x0 000 accelerators) instead of low-margin ($x00) gaming GPUs.

Sure but it doesn’t explain why AMD didn’t go for a ~400mm^2 RDNA 4.
 
Sure but it doesn’t explain why AMD didn’t go for a ~400mm^2 RDNA 4.
Maybe they didn't have enough time to prepare it. I'd also expect the chiplet part would be 3nm. 400mm² 3nm monolithic die could be quite expensive, while 400mm² 4nm monolithic die would have quite a high power consumption (lowering clocks would hurt performance = lower margins). I believe they found a better way how to utilize the available manufacturing capacities, so the used them that way.
 
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