WTF are you talking about? IPC is not a measure that can be used cross instruction set. A single x86 instruction is a lot more powerful than a single ARM instruction. (x86 can do a load and an alu op in a single instr. ARM can do a shift and an alu op, but that's generally less useful. Also, as I understand it, those get cracked to two ops on A15 and take two cycles.)
Also, you cannot even use IPC as a measure on a single instruction set without defining a specific program you are using. IPC depends massively on the code you run.
Also, no x86 cpu out there gets >3 IPC on generic code. BD is limited to <2 by the frontend when all threads are in use. This isn't that much of a limitation, because the very best cpus out there (SB,IB) can barely break 2 on typical code.