http://www.anandtech.com/storage/showdoc.aspx?i=3731
3bit mlc are good for the cache teory?
By 2011 im can produce cheap chip chiap at 25nm 3bit for 122mm2 ~+200MB/s, two of this for 16GB, and when the new process is available and cheap enought, halve the traces and put in a single ~100mm2 16GB chip
Maybe when new process is available in 2015 they can keep the 16GB size and buy custom sub 50mm2 chips
3bit mlc are good for the cache teory?
By 2011 im can produce cheap chip chiap at 25nm 3bit for 122mm2 ~+200MB/s, two of this for 16GB, and when the new process is available and cheap enought, halve the traces and put in a single ~100mm2 16GB chip
Maybe when new process is available in 2015 they can keep the 16GB size and buy custom sub 50mm2 chips
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