NVIDIA Maxwell Speculation Thread

Even if GM200 tapes out in N timeframe, there's no guarantee that they will release the first batch of produced chip months after that for desktop and not professional markets first.

 

http://www.geeks3d.com/20140502/geforce-gtx-titan-vs-a-render-farm-with-six-gtx-750/

 

A post on Chiphell forums (translated) apparently has information about GM204.

 

Didn't Erinyes say that even the big, proper Maxwell will be on 28nm? By late 2015 16nmFF will likely commercially viable for GPUs for mid-later 2016 unless they plan to make GP100, GP104, GP106 or whatever the heck those are called be released very late 2016 or 2017. I can see them doing a 870 later this year and then 880/880 Ti 1H 2015, with the former being 256-bit memory bus and the latter 384-bit bus. I just cannot see the HPC segement waiting for a 512-bit bus as they are primarily interested CUDA cores but then again I'm likely being ignorant and dumb.

Economics and laws of physics from the looks of it say that 20nmSoC at TSMC is not that good for High performance components and TSMC 16nmFF is based on TSMC's 20nm which will be more of a step up from 28nm and be more viable.

 

That sounds like a really nice performance/$ improvement. What does the line about A2 mean exactly? That Googlenglish isn't very intelligible.

 

I think that this:

means that the next step is A2 silicon for production release.

But that is just a guess.

 

That's my guess too (I'm not sure about the "trial" though).

Could a 512-bit bus (possibly with less die area per interface like in Hawaii) be useful for its increased memory capacity over a 384-bit bus or is it not worth it?

 

He was quite sure about 204/206; I don't think he was ever certain about GM200.

You're saying yourself that 16 FinFET is basically just 20SoC + FinFET. Which laws of physics are you referring to exactly since TSMC has stated in public the difference between 28HPm and 20SoC and 20SoC to 16FF?

One thing you can be sure about is that "laws of economics" would tell you that 3D transistors increase the manufacturing costs significantly.

 

Significantly? Are you SURE?

Laws of economics may state the market value of your product may increase significantly from 3D trannies, but production cost is orthogonal to that. Production cost is related to laws of physics; not economics.

(Besides, "laws" of economics is more like guidlines than actual rules, so... )

 

I'm now thinking of G73 : it was a 90nm GPU, but G73-B1 was the 80nm variant. Or duh, GT200 and the G9x products which were shrunk from 65nm to 55nm.
But those were half nodes, which aren't made anymore.

Point is, I think nvidia targetting multiple processes is believable. 28nm GM20x allows less expensive chips and importantly, time to market.
20nm sucks, but you have to use it for something? With new 28nm GPUs launched, you have more time to fix it and ramp it up. Eventually high volume GPU production can happen on it when it makes sense. Then not all that work is lost.. Mastering the 20SoC is obviously useful for mastering 16FF.

GM200 on 20nm is still a possibility? Heck I thought Volta was delayed because 16FF would not be ready in time and so I'm under the impression that Pascal is 20nm. If nvidia wants to make "the big chip" on a mature process and hardware bugs fixed, that adds time compared to just making the first GPU you can get through the door.

So Dangerman, if consumer 16FF GPUs are released in late 2016, the big chip could be somewhere around late 2017.
I speculate that GM200 will be released (or ready) in late 2015 and then Pascal in early 2016, and that both are reasonably similar and on 20nm.

 

Yeah I was referring to the GM200, I just went off a bit .

I was referring to that developing die shrinks is getting harder due physical limitations and workarounds such as new technologies such as FinFETs are required to see notable improvements to make die shrinks viable, this all needs massive financial investment. TSMC have shown IIRC in a slide that the expenses of developing newer nodes is expensive as we go down. For 16nmFF I think that was more people saying 16nmFF is TSMC 20nm with FinFETs in general which seems to catch on.

 

Let me do some layman's speculative math; assume GM200 is around 11b transistors which is rather a conservative estimate compared to GK110. Let's say they're really pushing the envelope under TSMC's 28HP and they're going for a 14M/sqmm transistor density you'll get a die that's almost 786mm2. If you consider that realistic, be my guest

It doesn't really answer my question now does it? Is the jump in theoretical transistor density from 20SoC to 16FinFET at TSMC smaller or bigger than 28HP to 20SoC?

I'd like to stand corrected but for a very big chip like the Maxwell top under TSMC 20SoC do I would estimate a best case scenario transistor density of 20Mio/mm2 vs. ~13Mio/mm2 for GK110 (else a rough 54% increase).

 

The jump from 20SoC to 16FF will be on the order of single digit percentages. 16FF+ offers only a 15% density increase.

http://www.cadence.com/Community/bl...-ahead-for-16nm-finfet-plus-10nm-and-7nm.aspx

My guess is that if there's no 20SOC GPU this year, there won't be an instead everyone is going to go to FF as soon as it's viable.

 

So are we expecting a higher end Maxwell this year?

 

Unless things go very wrong, yes and more than one chip.

 

So the new code name is Ethan.

 

I took it as a typo...

 

Yes damn smartphones when you thumb type in a hurry

 

So did I. I was joking.