Bagel seed
Veteran
2 months!
http://www.windowsitpro.com/article...o/wininfo-short-takes-february-15-2013-145253
Evidently he posted this over a week ago. Found that last bit interesting. Corroborates an earlier rumor about there being 2 Xbox systems. I find it odd that Microsoft would release another Xbox 360 model at the same time they release their next gen. Does that mean the 720 is not backward compatible? or maybe it is backward compatible? Confusing.
Tommy McClain
IBM is doing some kind of stacking and charlie has hinted the relation to durango, take that as you will. I expect something new compared to vgleaks specs. Gotta wait til April at the latest.
Well, there are a lot of people from IBM working on Durango. Maybe, just maybe, MikeR is right.
It's quite odd that in the VGLeaks documents showing the specs, which I suppose are kinda correct, they never mention Jaguar but just a 1.6GHz CPU.
Andy Maki, Senior Mixed Signal Design Engineer at Microsoft, ex IBM
http://www.linkedin.com/pub/andy-maki/37/a08/5b8
June 2012 – Present, work on cool stuff
Rob Shearer, Principal SOC Architect at Microsoft, ex IBM BlueGene/A2/Xbox360
www.linkedin.com/in/robshearer/
Microsoft: SOC Architecture in the Interactive Entertainment Business division.
May 2012 – Present, SoC Architecture for amazing new products that I can't tell you about.
Steve Faas, Silicon Design Manager at Microsoft , ex IBM
www.linkedin.com/pub/steve-faas/20/101/749/
July 2012 – Present ,Silicon Design Manager
Ilan Spillinger, Corporate VP IEB Hardware , ex VP Advanced Processor IBM
http://www.linkedin.com/pub/ilan-spillinger/7/a43/1b3
2011 – Present ,Corporate VP IEB Hardware
Yaron Galitzky, Sr Director, XBOX Kinect at Microsoft, ex Sr. R/D IBM
www.linkedin.com/in/yarongalitzky/
Jan 2010 - Present, Sr Director, XBOX Kinect
Adam Muff, Senior Hardware Engineer at Microsoft, ex IBM FP A2
Technical team lead for the Reservation Station, an out of order issue and dependency unit in a high performance embedded microprocessor. Significantly contributed to the overall architecture and implementation of a 2+ GHz multi-threaded super-scalar microprocessor.
www.linkedin.com/pub/adam-muff/7/474/90b/
June 2012 – Present ,Senior Hardware Engineer
Gene Leung, Senior Design Engineer, Ex IBM
Led multiple teams through ASIC/semi-custom timing methodology development and closure on large designs. Have closed timing on several designs that utilize high-speed serial and DDR interfaces
www.linkedin.com/pub/gene-leung/6/183/2ab/
June 2012 – Present
Previous IBM : timing lead for X86 scalability - Hardware emualtion - gameconsole GPU
Boris Bobrov, Director of Silicon Development, ex Freescale Direcotor of App. Engineerng Freescale (IBM related)
http://www.linkedin.com/pub/boris-bobrov/4/737/437
February 2010 – Present ,silicon design, hardware engineering ,Director of Silicon Development
Matthew Tubbs, Senior Hardware Design Engineer at Microsoft ,ex IBM A2,
http://www.linkedin.com/pub/matthew-tubbs/9/2b2/815
May 2012 – Present, Senior Hardware Design Engineer
Edit: Forgot to add this guy
Ex IBM, ex A2, Ex Bluegene, the one behind Xbox 360
now becoming Microsoft Sr Director of SOC and pricipal Architect XBOX, Eric Mejdrich
http://www.linkedin.com/pub/eric-mejdrich/1b/108/214
From the look of this, I am not sure if AMD is designing the Xbox Next's SoC at all. They have hired so many senior engineers that it looks like they are designing their own chip like Apple. If they use an all AMD design like Sony, I am not sure why MS needs so many hardware engineers from the beginning.
Hmm... We might be totally surprised after couple of months
Maybe they have some guys hired because they are creating their own hardware, not just Durango, but also Surface and such.
They could also need the IBM guys to help them with hardware support for the new (AMD based) Durango hardware.
We'll have to wait and see. 26 April, or whenever more info will leak.
Yes, it does seem like they have too many hardware type guys to simply farm out the next-gen Xbox to AMD. My guess is that most of the work these guys have done/are doing is focused on getting the memory subsystems and all the components to work efficiently. That won't show up in sexy flop count numbers, but is probably more important. Adding a pool of embedded RAM and have to work well with the CPU, GPU, and main memory while at the same time being fairly easy to use by software is no trivial task from a hardware point of view.
Don't you think that AMD has far more simulation experience with their own designs to evaluate this than some external engineers MS could hire?
If they were using any FPGA's, its only in the devkits and more likely just engineering prototypes.
The logic in the FPGA would be synthesized to a custom ASIC for the production as it would seem that it's used as nothing more as "glue" logic between the components.
The Kiwi system is targeted at making reconfigurable computing technology accessible to software engineers that are willing to express their computations as parallel programs...We have demonstrated that it is possible to write effective hardware descriptions as regular parallel programs and then compile them to circuits for realization on FPGAs...Our initial experimental work suggests that this is a viable approach which can be nicely coupled with vendor based synthesis tools to provide a powerful way to express digital circuits as parallel programs.
There are penalties from using DDR memory, which is the most appealing from a price-area-capacity viewpoint. The penalties can be limited to about 20%, but only when the data is arranged in very large and contiguous blocks. BRAMS are the easiest and most flexible way to create large and custom memory busses, which are very effective means to achieve speedups up to 8X over SRAM and ~5X over DDR. The very limited capacity of BRAMS means that they must be used in conjunction with some other external memory for most practical applications.
I used FPGAs in my work at MS. They would not be very useful in an end-user consumer product. Low clocks, really expensive/transistor. It would be a lot cheaper to invest in a good DSP.If they were using any FPGA's, its only in the devkits and more likely just engineering prototypes.
The logic in the FPGA would be synthesized to a custom ASIC for the production as it would seem that it's used as nothing more as "glue" logic between the components.
Yes, there's still a lot of speculation going on. Whether the company would be willing to explore the possibility of building a customized CPU or not hiring the engineers from IBM, remains to be seen, there is still some speculation on the matter.Maybe they have some guys hired because they are creating their own hardware, not just Durango, but also Surface and such.
They could also need the IBM guys to help them with hardware support for the new (AMD based) Durango hardware.
We'll have to wait and see. 26 April, or whenever more info will leak.