Kutaragi Ken: "PS3's GPU isn't an upgraded PC GPU"
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No. http://en.wikipedia.org/wiki/64DDAlpha_Spartan said:I thought it was optical media in a cartridge case? I'm pretty sure it was.one said:Surely not, because 64DD is a magnetic disk drive, not optical mediaAlpha_Spartan said:
Re: Kutaragi Ken: "PS3's GPU isn't an upgraded PC GPU&a
I'm fairly certain that 12 doesn't make sense. I waonder if they have actually replaced the memory bus with the 128-bit 4x32-bit crossbar from NV43 or beyond, just using two 64-bit crossbars or even left the 256-bit crossbar in place but just deactivated two of them.
Xmas said:
I'm fairly certain that 12 doesn't make sense. I waonder if they have actually replaced the memory bus with the 128-bit 4x32-bit crossbar from NV43 or beyond, just using two 64-bit crossbars or even left the 256-bit crossbar in place but just deactivated two of them.
Dave - I'm also curious about what exactly an ROP is. In the r500 case you could say that there are 8 (8 pixels per cycle) of them, but then each of them would have 24 execution units. I'm guessing this comes from 6 execution units per sample to handle (z,stencil,r,g,b,a) and 4 samples per pixel, but i really have no idea.
RSX has much less bandwidth available and there are rumors of 128bit HDR. Also, in the rather vague block diagram that was released, texture address, texture fetch, blending, and filtering were all lumped together. So... here's a tenuous guess: maybe all of these operations share physical functional units. Texture filtering and blending are after all pretty similar, and one can probably get away with less total fp32 functional units.
To justify that statement: texture units and ROPs can be quite imbalanced - in a z-only or stencil shadows pass for example, the texture units will be completely idle, whereas long shaders will probably result in low ROP usage. This way one could balance ROP/texture work (and maybe schedule memory accesses more effectively?)
what do you think (of the idea, not whether it'll be in whatever chip)?
RSX has much less bandwidth available and there are rumors of 128bit HDR. Also, in the rather vague block diagram that was released, texture address, texture fetch, blending, and filtering were all lumped together. So... here's a tenuous guess: maybe all of these operations share physical functional units. Texture filtering and blending are after all pretty similar, and one can probably get away with less total fp32 functional units.
To justify that statement: texture units and ROPs can be quite imbalanced - in a z-only or stencil shadows pass for example, the texture units will be completely idle, whereas long shaders will probably result in low ROP usage. This way one could balance ROP/texture work (and maybe schedule memory accesses more effectively?)
what do you think (of the idea, not whether it'll be in whatever chip)?
Re: Kutaragi Ken: "PS3's GPU isn't an upgraded PC GPU&a
psurge, that "blend" stage at the end of the TMU in the diagram here seems to be the sample accumulation stage required for trilinear/anisotropic filtering to me. Framebuffer blend circuitry would be misplaced there IMO.
Why would 12 not make sense? RSX does not only have a 128bit GDDR3 interface, but the FlexIO interface to XDR as well (which I guess is covered by the crossbar, just like the AGP/PCIe interface on PC chips is). Subtracting the bandwidth Cell requires, RSX may get less bandwidth than it would with just a dedicated 256bit GDDR3 interface like NV40 has, but more than with a 128bit interface. So something in between 8 and 16 could make sense IMO.DaveBaumann said:
psurge, that "blend" stage at the end of the TMU in the diagram here seems to be the sample accumulation stage required for trilinear/anisotropic filtering to me. Framebuffer blend circuitry would be misplaced there IMO.
xbdestroya said:
Well the first article is just plain bunk...
I'll grant you the second one since I was only thinking of the "GS" and wasn't considering the EE+GS@90nm part (which was piloted at OTSS who mainly fabbed EEs).
The third makes no mention of Toshiba fabbing the GS... The GS (stand-alone has been fabbed at Kagoshima (Old Sony Semiconductor Kokubu facility, and SCEI Fab1 and Fab2 in Nagasaki). I guess you can count OTSS for the 90nm combined part since it's partially owned by Toshiba. However, your assertion that Toshiba was "heavily" involved with the manufacture or design of the GS is still wrong. Toshiba did however play a heavy role with the EE and it's TX-79 offspring...
marconelly!
Veteran
What are the chances RSX will have 24 pixel and 4 vertex pipes? I think the calculation MS people provided makes sense in that particular segment. Announced 136 shader ops can be calculated as:
24pixel pipes * (4alu ops + 1texture op) + (4*4scalar ops) = 136
4 vertex pipes is less than even 6800.
other option would be to have 10 vertex pipes, and that the calculation would not include a texture op.
24 *4 + (4*10) = 136
Which one is more likely? Or maybe there's a third option?
24pixel pipes * (4alu ops + 1texture op) + (4*4scalar ops) = 136
4 vertex pipes is less than even 6800.
other option would be to have 10 vertex pipes, and that the calculation would not include a texture op.
24 *4 + (4*10) = 136
Which one is more likely? Or maybe there's a third option?
archie4oz said:
I think all of Toshiba's rumored involvement with the supposed GS successor seems to have translated in my mind retroactively into larger involvement with the original GS as well. They were involved with the process and manufacture, but it's true that at first it was not as great a role of involvment as I thought. Heavy was too strong a word in that sense. Consider me as waving a white flag as far as this Toshiba GS thing goes.
gmoran said:
24* (2*Vec3+2*Scalar+Texture) + 8* (Vec4+Scalar)
Just like the R420 with more pipes and vertex shaders.
So does no-one think it will have 24 ROPs like im assuming the G70 will?
http://www.beyond3d.com/forum/viewtopic.php?p=531473#531473
My guess,
136 Shader ops ~ 52 vec4 + 52 scalar + 32 vec3
32 Pixel Shader ~ 32 vec4 + 32 scalar + 32 vec3
20 Vertex Shader ~ 20 vec4 + 20 scalar
My guess,
136 Shader ops ~ 52 vec4 + 52 scalar + 32 vec3
32 Pixel Shader ~ 32 vec4 + 32 scalar + 32 vec3
20 Vertex Shader ~ 20 vec4 + 20 scalar
Jaws said:
Note, separate 'pool' of texture/blend units.
Also add 16 ROPs that Dave is hinting too!
And WTH are SFU's!
http://www.beyond3d.com/forum/viewtopic.php?t=22991
The ROPs/blend circuitry is part of the memory controller in NV40. It makes sense to keep the data paths for the color reads as short as possible.psurge said:
Yes, but with two "full" ALUs and a completely different pipeline organizationpjbliverpool said:
They would be completely bandwidth starved. 16 for G70 sounds about right IMO, RSX could go with less.
Special function units (rcp, rsq, sincos, exp, etc.)Jaws said:And WTH are SFU's!
