That was definitely a possibility. Cell has 8 cores. Lose the LS and you could fit 16 cores. Memory management would kill you though. And if they went with 8 cores, may as well go with Cell!
With x86 though the instruction decode stage is large because, presumably, you'd want to convert into a RISC microcode. Also, x86 on its own has a horrid FP implementation! As for the LS, that is the beauty of the Cell architecture; you could drop them and use L1 caching etc., but with MS wanting OoOE execution if they went with x86 it would be a prohibitively large matching store for the Re-Order Buffers. You simply couldn't fit it on a chip, not even of Cell's size.