Arun, if you're reading, do you have any preliminary thoughts on Z600 and the silicon required for designs, specifically with regards to integration and the area and number of chips (especially the mixed signal chip and what radio ICs you see being paired with the chipset) ?
Oh hai!
The level of integration is just fine besides for the very real disadvantages of the two-chip approach and the lack of Package-on-Package DRAM for LPDDR1 (a very strange omission since it's widely supported on 14x14 packages - surely Intel didn't *need* to use a 13.8x13.8 package?). One interesting point is that both packages are 0.5mm pitch, versus 0.4mm for high-end ARM SoCs, which could save a little bit of cost on the PCB but besides that it's apparent that Intel's packaging expertise is rather below average.
The I/O partitioning between the two chips is also bizarre: LVDS on Lincroft and HDMI on Langwell, for example - whereas ARM competitors usually integrate HDMI but need a separate chip for LVDS in tablet designs (because LVDS normally needs extra process steps on modern process nodes iirc). Putting the ISP on Langwell is also a bizarre choice and feels more like a late-stage addition (same for HDMI), although in the end it doesn't really matter. On the other hand being limited to 5MP is rather absurd, especially as it's easy to get an on-sensor-package ISP at 5MP or below (see: Apple, they don't integrate an ISP!) but rare above so you'd need a moderately expensive discrete chip.
In the seemingly cancelled LG GW990, the Z600 was combined with a Ericsson 3G module (i.e. pre-certified in several key ways to simplify design/time-to-market but increasing costs) based, afaik, on the ST-Ericsson M340. But it could probably be combined with any of the very popular slim modems in the industry, such as the Infineon X-Gold 616 or Icera ICE8040 for WCDMA and Qualcomm QSC6085 for CDMA. The area penalty of not integrating the baseband is diminishing all the time, and the RF side is probably more important right now anyway (see: Infineon UE2 for a leading-edge example). The decision to work with Nokia on baseband technology for the mid-term highlights Intel's lack of understanding of the field, IMO, and is a negative overall in my mind.
Power management is interesting. The various implementations of Briertown by different analogue companies (not necessarily single-chip in fact but that's not important) are probably the most advanced chips in their field I'm aware of - and also the most expensive. Seriously, NINE DC/DC?! The latest ARM SoCs used 4 at most. Part of it is the extra complexity of the two-chip approach each needing different voltages, but there's also a nice bonus feature: you can power the baseband with no secondary power management chip. It's really a system solution (using partnerships with the likes of ST-Ericsson and Icera) which is nice, even if overall power management is still more expensive and it limits their choices a bit because Infineon for example integrates the PMU (SoC on 65nm, interestingly back to SiP on 40nm - guess they figured the cost/mm2 was too expensive for something that nearly doesn't scale!)
Connectivity-wise, WLCSP and QFN packages are very cheap, and there isn't that much that could be shared between standards anyway. So the lack of integration is irrelevant. The only company that pushed aggressively on that front in the 3G market was Broadcom, and they achieved a grand total of zero design wins for their 'Zeus' baseband (see Linley Group's news on that). Integration is nice, but it's nearly always secondary to other things.
Talking of other things:I could be reading the slides wrong, but it seems to me they're hinting at only 720p support when limited to 32-bit LPDDR1. Being limited to 20Mbps at 1080p is also intriguing, I wonder if this is the same VXD375 as in the A4? The advantage there against TI or NVIDIA or basically nil to be honest (NV is limited to low bitrates at HP on 1080p, but it's enough for YouTube support iirc). At least in terms of 3D graphics, it's truly leading-edge with such a highly clocked SGX535. The idea of putting an audio island on Langwell also seems like a fine strategy even if power consumption there is still a fair bit higher than you'd want it to be.
Overall it's obviously a MASSIVE step-up from Menlow, and Medfield should be truly excellent in many ways. I wonder how Rayfield would react if he realized I was actually (only slightly) too *pessimistic* about Moorestown's power numbers, hah. However, it remains expensive and, most importantly, the game has moved on. When Menlow came out the OS war was still raging and this coupled with Moblin and a 3D UI could have been a very strong contender. But now they're pushing for MeeGo and Android (presumably Chrome OS later) - but Android doesn't make perfect sense. The Java apps will be compatible cross-ISA, but as of 1.5 (or was it 1.6?) there's a native SDK which compiles directly to ARM, and it's what's used for anything interesting 3D-wise for example. So x86 has now become a disadvantage OS-wise (even if not as much as it could have been) which is ironic given Intel's past marketing.
The biggest business opportunity for Intel here is if they can get Nokia completely on board in larger MeeGo form-factors (5-12"), along with a bunch of ODMs and PC-centric OEMs (even though they all have ARM, usually Tegra, R&D programs now). They won't get smartphone volume on this part, no way, but a few flagship design wins could give them credibility with Medfield, and that would spice things up.
Intel's 32nm process seems very strong, and the competitiveness of ARM-based SoCs will depend a bit on TSMC's execution for 28nm - specifically the 28LPT and 28HPM nodes (I don't know about TI, but I know nearly for certain that those are the specific process variants used by both NVIDIA & Qualcomm for Tegra/Snapdragon 3 & 4 respectively). Moorestown feels to be a bit too little, a bit too late to me - but definitely big kudos to the engineering teams either way.