G70 Vs X1800 Efficiency

Discussion in 'Architecture and Products' started by russo121, Oct 10, 2005.

  1. russo121

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    /*Start sarcasm

    Rendering games, maybe?:evil:

    I think the desing goal of ATI X1xx is PPU, no?! http://techreport.com/onearticle.x/8887:evil::evil:

    */ End Sarcasm

    To me, this test is very interesting because it can tell you if you should buy R520 or wait for G70 90nm - essencially if r580 and G70 have the same number of pipes and clocks (please don't tell me Nvidia will not achieve R5xx clocks because we don't know a thing - I don't know).

    To me efficiency is directly connected to IPC - and efficiency of rendering games (faster for the same clock and pipes) - I don't care how much heat, noise it will produce neither power it will consume, because if you care about that, then SLI and Xfire don't make sense.
     
  2. Sxotty

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    But you should not get that message.

    If you do then let me tell you a secret, the g80 will be better than the g70 @90nm, or the r520. Of course so wil the r580 so you should just wait until then at least...
     
  3. Jawed

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    A "32 pipe G70" at 600MHz versus a 48 shader-pipe/16-texture pipe R580 at 600MHz, both with 750MHz+ memory should be interesting...

    Jawed
     
  4. trinibwoy

    trinibwoy Meh
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    G70 wins in OpenGL and older titles that still rely heavily on texturing. R580 destroys it in anything with moderate-heavy use of dynamic branching. So it looks just like 6800 vs X1600XT today.

    But who's to say the G70 refresh in the spring won't have decoupled texture units as well.There was a post with a recent patent around here somewhere.
     
  5. rwolf

    rwolf Rock Star
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    I doubt that is going to happen. There is a benefit moving to 90nm, but the stages in the chip must be engineered to run at the clock speed intended. I doubt that they are going to add pipeline stages (not to be confused with pixel pipelines) to the architecture.

    The other issue is power leakage which is more common with smaller transistor sizes.
     
  6. Jawed

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    G70 refresh is just going to be a 90nm part, I reckon (sooner than spring). I actually doubt it'll have more pipes. I was being a little facetious.

    That decoupled texture pipes patent (and the scheduling patent) would, I guess, arrive together in G80 around May/June time in the DX10 part, or maybe later.

    Jawed
     
  7. Ho_Ho

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    I wonder why it hasn't occured to any of you that for the same amount of pipelines R520 uses much more transistors than G70.


    PS!!
    I am no expert on the subject, most of the calculations are really simple and are probably not 100% correct. Especially I doubt I understood (2) correctly. Don't take my words as facts but just as something to think about. I don't guarantee that those two links have correct numbers but I belive they do.


    24pipe GTX has about 302M wheras 16pipe R520 has 321M (1). If one disables 8 pixel pipelines on GTX then that would leave it with even less working transistors, I think somewhere around 220-230M after disabling 8 pixel pipelines. I was amazed to see that even then GTX could keep up wit R520 quite well.

    Next lets see what could happen when NV moves from 110 to 90nm. When we belive what ATI sais (2) about the subject and my calculations are correct* then on the same die area as in G70 ~600M transistors can be put. Assuming that pipelines transistor counts scale lieneary that would mean about 16 vertex pipelines and 48 pixel pipelines running around 515MHz. Considering how well G70 OC's even without SoI I wouldn't be suprised if it would run around 600+MHz.
    *) if they are not please tell me what I did wrong. If anyone is interested in my calculation formulas just let me know and I give the "formulas" of how to multiply a few numbers together :)

    ATI can't have such a massive increase in pipeline counts because it already has moved to a smaller manufacturing process. It could increase its die size from 263mm2 to about the same size as G70 is (333mm2) but that would mean it could only fit about 9 vertex pipes and 20 pixel pipelines on the die of the size of G70.

    1)transistor counts and die areas:
    http://techreport.com/reviews/2005q4/radeon-x1000/index.x?pg=3

    2)what happens when new technologies are taken to use:
    http://www.hardocp.com/image.html?image=MTEyODI4MDE0MEFCVGlYSnBoRUNfM18xX2wuanBn


    There is no doubt that R520 has more efficient when comparing speed on the same clock and pipelines. And why shouldn't it if it has about 40% more transistors per pipeline. When comparing transistor counts there is a whole different story though and it would take a massive clockspeed to macth the speed of G70.
     
  8. Pete

    Pete Moderate Nuisance
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    But what if ATI spent some extra transistors to "decouple" the TMUs from the pixel pipes in order to make adding extra pixel shader units cheaper? The whole more, dumber pipes is better than fewer, more capable ones argument from NV30 -> NV40. I wonder how the transistor counts would compare b/w a 32 pipe G70 and a 48PS/16TMU R580, as Jawed (facetiously or not) suggested. Assuming, of course, that the two can clock similarly. Comparable power draws would make things easier, too. ;)

    I'm not sure why it's so surpising that a pipeline-reduced G70 at close to (or slightly higher than--has Veridian verified the GPU's individual domain clocks yet?) stock speeds can keep pace with a clocked-reduced R520, especially in the few tests conducted. They each trade off some of their advantages. If Digit-Life's die size comparison shots are correct, tho, I don't think nV will want to put up something the size of G70 against something the size of R520.
     
  9. egore

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    If NV adds better dynamic branching performance and HDR+AA to compete with ATI wont that eat allot of the extra die space. I can't see NV adding any extra pipes or having a 24pipe G70 90nm running at 550 or 600 Mhz.
     
  10. 3dcgi

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    Memeory latency is important. Graphics chips are designed to hide memory latency, but it can't always be hidden. Caches are sized to hide this latency and increasing latency from what is expected can increase the penalty. On top of this the ideal cache size can be a difficult thing to determine until a lot of performance modeling or real world testing has been done.
     
  11. Ailuros

    Ailuros Epsilon plus three
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    Depends how you count "pipes" in either case. Besides it could very well be 32*8 vs. 48*4....
     
  12. Humus

    Humus Crazy coder
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    Most shaders have more than 3 ALU instructions ...
     
  13. Razor1

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    Actaully the clocks started uping after the g70 was released, devs were getting cards from 450 mhz to 550 mhz, always going up since the g70 was released. Well at 625 this thing produces quite a bit heat, its not really a choice for ATi to go higher since they can't. The reference cooler design was copper all the way back from e3, so at that time ATi knew this thing was a furance. The only way ATi would think this thing would go higher clocks on air is if they thought there would be no leakage or the leakage problem would be fixed.
     
  14. Bruce

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    huh?
    not even close to efficient..?
    i am actually wondering why its almost on par often and sometimes faster in shader benchies then? i think the r520 did very well in this test if you count in that it is used far beneath its designed operating ranges.
     
    #174 Bruce, Oct 12, 2005
    Last edited by a moderator: Oct 12, 2005
  15. Dave Baumann

    Dave Baumann Gamerscore Wh...
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    They were always going to be higher than that - the issue prevented them from yielding much beyond those speeds though. If it wasn't architected to reach beyond 500MHz then they wouldn't have spent 6 months chasing their tail trying to fix it.
     
  16. Mariner

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    I don't really see why so many people expect the 90nm iteration of G70 (whatever it may be) to have a much lower heat dissipation/power draw than R520. It seems likely to me that TSMC's 90nm process suffers considerable current leakage (seen before with Intel's 90nm process). As NV will be using exactly the same TSMC process as ATI, why should their chip have lower power draw? I do realise chip that design also affects power draw but I think we'll have to wait and see how "G7X" fares rather than making assumptions.
     
  17. wireframe

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    I would think this depends on which route Nvidia takes. Lower frequencies should help and it would make sense to use 90nm for putting more transistors in there instead of cranking clocks. However, it seems most rumors are going the higher clock route instead of increasing pixel pipelines to 32.
     
  18. stepz

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    I was under the impression that caches are used to optimize bandwidth usage ie. not fetch the same texels twice. Although caches can also be used to store prefetched data it would seem to me that its smarter to use resources for keeping more threads in flight to work around the latency than to prefetch speculatively and add lots of caches so that the prefetches don't waste a lot of bandwidth.
     
  19. Geo

    Geo Mostly Harmless
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    MuFu, for instance, was quoting 650 in public as early as March.
     
  20. chavvdarrr

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    afaik, 1800XL has twice the transistior count as X800, yet has ~ same power draw
    Why should we expect less from NV?
     
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