Rootax
Veteran
AMD: Zen 2 (Ryzen/Threadripper 3000?, Epyc 8000?) Speculation, Rumours and Discussion
Why use Cell when they have vector units from Emotion Engine?What about a 14nm Cell
There's some inconsistency from various sources about the exact die area of Zeppelin, from 192-213 mm2. AMD's EPYC marketing seems to go with the higher figure.
CCX area is 44mm2, so removing the two CCXs from a Zen die leaves between 104-125mm2 of uncore. The 14nm IO die would have to have all of the functionality of the prior product, with whatever area PCIe 4.0 and additional features might add. The IO die doesn't need to have the same kind IFOP connectivity as a chip that might go into a 4-chip MCM, but at the same time its likely the links to each chiplet have double or more the bandwidth and may remove some of the limited area savings from that.
Perhaps there's some mechanism for reducing latency for shared lines being used for synchronization, although some ideas indicated in patents would have a limited set of buffers at or near the memory controllers for that.
That brings AMD's high-end cores into the same place as Jaguar and Intel's L1I. That would be the first time in a long time that the mainline cores would not have an L1 with a capacity too large for its associativity to prevent a possible aliasing problem where the same physical address can be cached in more than one place in the L1 due to different virtual translations. The cache would need to monitor and invalidate synonyms on the fly to prevent problems. Increasing associativity and/or reducing capacity to bring the relationship in line would be the most direct ways of handling it.
From googling, I think the K5 was the last main core from AMD with that distinction.
AMD submitted Linux changes for Bulldozer to help minimize the performance cost of such invalidations in the L1I, although at the cost of not allowing memory allocations with differing values in the affected addresses bits. I don't know what came of that, though I think there were objections from the maintainers of Linux due to this eating away at the entropy for ASLR.
hoom
Veteran
https://www.anandtech.com/show/1440...-cores-for-499-up-to-46-ghz-pcie-40-coming-77
Beats Intel on base-clock but lacking in turbo & in some cases TDP https://www.anandtech.com/show/14402/intel-announces-5-ghz-all-core-turbo-cpu
AMD has an extra couple hundred Mhz thermalmajiggy thats presumably not included in these specs?
If so these boost clocks are right up there.
Beats Intel on base-clock but lacking in turbo & in some cases TDP https://www.anandtech.com/show/14402/intel-announces-5-ghz-all-core-turbo-cpu
AMD has an extra couple hundred Mhz thermalmajiggy thats presumably not included in these specs?
If so these boost clocks are right up there.
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Memory test run with the latest AIDA build. The L1 cache read throughput is kind of low for 12 Zen2 cores with 256-bit AVX pipes. I hope the issue is in the benchmark.
Source: https://wccftech.com/amd-ryzen-3000-zen-2-cpu-5-ghz-overclock-4-5-ghz-all-core-boost/
Memory test run with the latest AIDA build. The L1 cache read throughput is kind of low for 12 Zen2 cores with 256-bit AVX pipes. I hope the issue is in the benchmark.
Source: https://wccftech.com/amd-ryzen-3000-zen-2-cpu-5-ghz-overclock-4-5-ghz-all-core-boost/
Never mind that, if the main memory latency improvement is real, it's huge. This would probably change the gaming competitive landscape entirely.
D
Deleted member 13524
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It is? It seems in line with the whopping 4000MT/s speed of the RAM they put in it.
What am I missing?
The current generation Ryzen CPUs have a memory latency closer to 80ns: https://www.hardware.fr/articles/974-4/gain-latence-lie.html
Granted, that's with slower memory, but still!
Edit: OK, more like 65ns with DDR4-3400:
https://techreport.com/review/33531/amd-ryzen-7-2700x-and-ryzen-5-2600x-cpus-reviewed/4
But this would still put AMD roughly on par with Intel, which would be a huge improvement.
The bandwidth figures for the L2 and L3 don't look right, or at least don't look very good to AIDA64 results I've seen for a 12-core Threadripper. The L2 at least should be too tightly integrated with the core to be affected by any changes introduced by the chiplet strategy.
Memory test run with the latest AIDA build. The L1 cache read throughput is kind of low for 12 Zen2 cores with 256-bit AVX pipes. I hope the issue is in the benchmark.
Source: https://wccftech.com/amd-ryzen-3000-zen-2-cpu-5-ghz-overclock-4-5-ghz-all-core-boost/
This is a fake. Source: Stilt pointed out at iotech forums (Finnish) that this specific version of AIDA64 cannot output that specific "CPU Stepping" string. This was made in photoshop.
Also, the cache latencies/bandwidths are more in line with Intel CPUs than Zen ones.
Well then, there goes my hope for Zen2 as a gaming beast.
it's not easy to choose a Ryzen CPU nowadays, basically any model is soooo good. Also, my MSi B350M Gaming motherboard is compatible with the 3rd generation of Ryzen processors, so whenever I jump in, I am still not sure about what Ryzen CPU to choose. In that sense I think Intel is lagging behind nowadays, although I still prefer Intel processors when it comes to laptops.
In a desktop computer though, there's nothing like Ryzen, imho
I'd recommend an X version and leave it to boost itself rather than manually overclocking to force all-core Mhz. As long as you have a good cooler, decent motherboard and some optimized power delivery, it will boost high when needed and manual OC won't really net you much higher, if anything.
Of course that's coming from a zen+, we don't know the characteristics of Zen2 yet, especially given the chipset and i/o design.
Yeah all Ryzen CPUs are good value but I think my sweetspot monetary is in the 200~ range. I got a Strixx B350 and 3k Mhz memory so will be plug and play.
About the OC I heard from Actually Hardcore Overclocking that there will be a third clock region I assume its the memory controller/OI chip and will be OCble. We will see on 7/7.
About the OC I heard from Actually Hardcore Overclocking that there will be a third clock region I assume its the memory controller/OI chip and will be OCble. We will see on 7/7.
itsmydamnation
Veteran
all aboard the 5 jigglehurtz 6/12 core hype train....
https://translate.google.com/transl...irect&goto=findpost&ptid=2000764&pid=42308041
choo choo
https://translate.google.com/transl...irect&goto=findpost&ptid=2000764&pid=42308041
choo choo
Silent_Buddha
Legend
Being "black out of love" I also "don't want to black".
That google translation is glorious.
Regards,
SB
itsmydamnation
Veteran
i dont actually care about 5ghz in all honesty,
if i can get 6 to 8 core 4.6-4.7 all core O.C on a higher end B450/ value for money X470 with mid 3k mem clock and the hinted at ability ( by buildzoid) to control HT/IF clock then i'll be happy as larry will be happy as a pig in mud (i'll probably buy 3 ) .
if i can get 6 to 8 core 4.6-4.7 all core O.C on a higher end B450/ value for money X470 with mid 3k mem clock and the hinted at ability ( by buildzoid) to control HT/IF clock then i'll be happy as larry will be happy as a pig in mud (i'll probably buy 3
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