AMD: Zen 2 (Ryzen/Threadripper 3000?, Epyc 8000?) Speculation, Rumours and Discussion

Discussion in 'PC Industry' started by ToTTenTranz, Oct 8, 2018.

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  1. xEx

    xEx
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    Is pretty much impossible to understand unless we have a Chinese speaker here. Btw why we don't have any Chinese speakers here? :runaway: I hope the OC would be equal for non 570 MB. It would be disappointing if only 570MB could use the "new clock" OC
     
  2. Alexko

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    That's racist.
     
  3. BRiT

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    Same reasons less and less dev's post here, they dont want to put up with the various company fanboys?
     
  4. xEx

    xEx
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    :sad:
     
  5. xEx

    xEx
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    From all the leaks it appears than the 3600(non x) would be at least at the level of the 8700K without any OC. I can't wait for real BM and see how much they really compare.
     
  6. xEx

    xEx
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    Btw any thoughts on Zen's new memory latencies? I think its a reasonable compromise.

    [​IMG]
     
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  7. AlBran

    AlBran Ferro-Fibrous
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    #227 AlBran, Jun 13, 2019
    Last edited: Jun 13, 2019
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  8. Malo

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    It Just Works... as long as your motherboard vendor has it on QVL. Otherwise, good luck :)
     
  9. xEx

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    How do I know if my MoBo have it?
     
  10. BRiT

    BRiT (╯°□°)╯
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    Does it work? ;-)
     
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  11. fellix

    fellix Hey, You!
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    Me thinks dual chiplet CPUs (12/16 cores) will be more suitable for half-speed IF configs with high-speed RAM, where heavily multi-threaded workloads will be limited mostly by the BW than overall latency.
     
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  12. Malo

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    Check the memory QVL on your motherboard manufacturer's website

    More importantly, does it work at advertised speeds and timings and is stable? :)
     
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  13. xEx

    xEx
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    Oh you mean Qualify Vendor List..yes my Mobo supports Ryzen. its a b350 strixx although asus haven't listed ryzen 3000 officially in the QVL page of the board.
     
  14. Malo

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    I'm referring to the high speed memory support, not the CPU support.
     
  15. Gubbi

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    The new IF links are 512 bit, 256 bits each way. This means the read bandwidth of the IF link matches the bandwidth of two DDR4 channels exactly. If you use DDR4 fast enough to force the IF links into 1:2 mode, you end up with a lot of DRAM bandwidth you can't use, unless you have perfect 50/50 read/write traffic (which you don't).

    IE. The only use case of DDR4 faster than 3800MHz is for dual chiplet processors.

    Cheers
     
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  16. hoom

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  17. xEx

    xEx
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    Interesting conversation:

     
  18. hoom

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    Been slowly digesting the Anandtech article, there's an awful lot of doubling of stuff there that should at least help out with a bunch of corner cases.
    Bunch of other improvements also.

    TAGE branch predictor could be a big win, from what I've been reading apparently is pretty bleeding edge tech, much better than Perceptrons they've been using previously (vid above says it was intended for Zen3 but they brought it forward :shock:), though I did find a suggestion Intel has already been using this.

    Regarding the AVX256: will they do double-rate 128bit?

    Occurs to me this chiplet architecture is arguably a return to separate CPU-Northbridge-Southbridge
     
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  19. Rootax

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    I wonder what impact avx256 will have on frequencies, temps, etc. On my (old) 5820k, using avx256 really push the temps vs non avx workload. And I my memory serves me right, they started avec different frequencies for avx256 / non avx256 with broadwell ? Or is it only with avx512/skylake-x ?
     
  20. hoom

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    According to Anand article apparently the scheduler tries to split them up to manage thermals -> no dedicated clock reduction like Intel has but not ruling out thermal throttling via normal systems.
     
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