AMD RyZen CPU Architecture for 2017

[Blazkowicz]

Wow, Prime 95 has child windows?
That's cool, everything I have only has tabs or just windows.
(Worst I ever did under Windows : select about 60 directories while browsing in icon mode. Right-click to open the context menu. Hit "Search". That's it! Haven't tried under newer/recent versions)

 

[Clukos]

I re-downloaded the prime95 version that is optimized for Ryzen and retesting right now, will post results.

Edit:

Similar or better results

 

[Clukos]

Testing CPU limits in games at 1080p with everything maxed, seems pretty good:

 

[Blazkowicz]

Wow, there were a few things I missed in 19th century's history.
thanks for the vids

 

[Deleted member 2197]

@Clukos ... I may have missed it but did not see any memory latency metric. You should download latest version of AIDA64 optimized for Ryzen and check.

 

[Clukos]

@Clukos ... I may have missed it but did not see any memory latency metric. You should download latest version of AIDA64 optimized for Ryzen and check.

This is with 3600CL16 (bclk oc):

 

[Davros]

Does RAM speed REALLY matter?

 

[Pressure]

So, does RAM speed really matter?

I thought we all agreed to give context to those videos ...

 

[Clukos]

It does matter, in some games more than others. These videos will never be able to fully cover every game and every scenario so take them with a grain of salt. If you are CPU limited, mem bandwidth helps, especially so with Ryzen.

 

[Clukos]

Small update on the ram, I was able to tighten the timings down to CL14 at 3600MHz

These Samsung b-die kits are very easy to overclock Now time to test stability.

 

[Clukos]

3.9GHz OC with bclk (seems to be stable as well):

And the most impressive thing:

Maximum power draw (all cores to 100%) 107 watts, 124 with soc combined.

 

[Malo]

You must have got a nice 1700 sample and your motherboard of course helps with the stable overclock. Running 3.9Ghz @ 1.3v is extremely good if it's stable.

 

[Kyyla]

Why did you raise the blck?

 

[Clukos]

You must have got a nice 1700 sample and your motherboard of course helps with the stable overclock. Running 3.9Ghz @ 1.3v is extremely good if it's stable.

It is somewhat stable, I can run anything from games, benches, stress tests but it's always crashing when rendering a h.264 video with Premiere. It is perfectly stable at 3.840 though (x32 multi instead of x32.5).

Why did you raise the blck?

I'm just doing it to get better memory timings, the stock 3200 strap has very loose memory sub-timings, which is something that I cannot change through bios. I dropped it back at 3200 CL14 because 3600MHz acts a bit weird right now, it's almost stable but not quite. I'll have to see if that changes in any upcoming bios.

 

[Clukos]

I uploaded yet another video with Syndicate, this game seems to love Ryzen:

The scaling is almost perfect.

 

[Malo]

I uploaded yet another video with Syndicate, this game seems to love Ryzen:

The scaling is almost perfect.

Wow that's a lot of multi-threaded CPU usage and the GPU is also maxed out.

 

[AlNom]

In-game texture sampling looks awful.

 

[itsmydamnation]

I'm just doing it to get better memory timings, the stock 3200 strap has very loose memory sub-timings, which is something that I cannot change through bios. I dropped it back at 3200 CL14 because 3600MHz acts a bit weird right now, it's almost stable but not quite. I'll have to see if that changes in any upcoming bios.

Are you doing bclk only? What happens to single Core XFR clock? Can it reach around 4.5ghz (112x41)?

 

[itsmydamnation]

http://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf

page 28
so we now know why 2p doesn't look as good as 1P.
for E12G i found:
http://archive.eetindia.co.in/www.eetindia.co.in/ART_8800694702_1800006_NP_2a7a2b70.HTM so a synopsys product.
https://www.synopsys.com/dw/ipdir.php?ds=dwc_ether_enterprise12g

GMI(same package) has its own PHY but xGMI(inter processor) needs to use PCI-E

if we assume the GMI phy is also 4x12G ( they are rated to 12.5) ( but much smaller lower power interfaces) then each Zepplin has 384G of physical bandwidth, /2 - encode lets say 2% that 188Gb/s of bi-dir bandwidth per SOC within the package. But the second you need to go inter processor you drop down to PCI-E based 16Gb/s per SOC within the package!

But if we go to here http://wccftech.com/amd-opteron-mcm-zeppelin-cpu-greenland-hbm-data-fabric/ then my first guess seems to high. So if we assume 2 Zepplin SOC's (needed for 100gb/s @ DDR4 3200) and we assume a symmetric triangle topology and that fuds numbers are correct, then each GMI interface phy is 25Gb/s so they could be 1x sized 12G interfaces. But then is it 100gb/s bi-dir? In which case they could be 2x sized interfaces.

Given what Neilz has said, i think each of the 4 GMI PCS is a 25gb/s Bi-dir controller because going from 50Gb/s bi-dir to 16Gb/s off package doesn't seems that bad, but 100Gb/s bi-dir to 16Gb/s bi-dir is ~6 times lower.

So then to come full circle i think my inital guess was 2x to high.

So what do other people think?
Time to go looking for the GMI interfaces!

 

[hoom]

From the pdf

Numbers fit for this

The 'mystery' pair of 12G are apparently WAFL whatever that is? Linked to Control Fabric, not Data Fabric.

Edit: CarstenS older guess https://forum.beyond3d.com/threads/amd-ryzen-cpu-architecture-for-2017.56187/page-63#post-1972569

GMI(same package) has its own PHY but xGMI(inter processor) needs to use PCI-E

I don't get where this is from?