AMD RyZen CPU Architecture for 2017

[xEx]

Well I find hard to believe that AMD will only have 8 core FXs and a ultra low supply of 6 and 4 cores.

I know they will be APU with Zen(zen will be in every cpu of AMD) but I do think we will have 8 and 4 core variance(and maybe with and without SMT(as a way to lower prices even more)). I think we will know for sure soon.

 

[Blazkowicz]

AMD has been selling a lot of salvage dies for years, eating the cost but essentially fielding a single die per family of products (or even using a die across different kinds of products)

For Zen quad cores, I expect there will be a second source eventually : Zen APU with the GPU disabled. In the mean time, Excavator APU with the GPU disabled is available as a lower end CPU-only product.

 

[Laurent06]

Btw I was thinking, will it be possible/worth implementing a "giant" branch predictor/prefetch?

Both branch prediction and prefetch rely on trying to guess what will happen in the future based on the past. The problem is that some branches and some loads are basically not predictable and never will be no matter what your algorithm is and no matter how large your predictors are; think of reading words from a file and searching for them in a dictionary (compression does that a lot), this will produce a lot of unpredictable branches.

This doesn't mean you don't need large BP/prefetch, just that there's a point of diminishing return

That being said (sorry if that was obvious), given Zen is also targeting the server market, I expect they will have generously sized their structures.

 

[3dilettante]

Well I find hard to believe that AMD will only have 8 core FXs and a ultra low supply of 6 and 4 cores.

Summit Ridge is a die that is targeting server/workstation, with it filtering down to the upper performance tier for desktops. This is rolling out the server product for revenue and real-world use while the preparations in that more demanding and lucrative space continue. Depending on yields, how low the 6 and 4 core supply is unclear.

Even if the 4 cores are salvaged 8-cores, they would come from the same wafer as the high-priced ones. It's just a question of whether AMD tosses the faulty chips for zero money, or gets some cash out of them. The R&D and wafer manufacturing costs were spent either way, not using the faulty chips leaves money on the table.

 

[xEx]

Summit Ridge is a die that is targeting server/workstation, with it filtering down to the upper performance tier for desktops. This is rolling out the server product for revenue and real-world use while the preparations in that more demanding and lucrative space continue. Depending on yields, how low the 6 and 4 core supply is unclear.

Even if the 4 cores are salvaged 8-cores, they would come from the same wafer as the high-priced ones. It's just a question of whether AMD tosses the faulty chips for zero money, or gets some cash out of them. The R&D and wafer manufacturing costs were spent either way, not using the faulty chips leaves money on the table.

No1 is questioning whether or not AMD will re use bad dies but that all the supply will come from then is another completely different story. AMD could use the worst dies from the server side to power the customer 8 core and reuse or disable bad dies to feed the 6 and 4 core line. But to have enough supplies of bad dies to feed the 6 and 4 core lines(which have higher demand) is questionable or you have a really big problem.

The reuse of bad dies prevent loses but does not make making the cpus any cheaper per se. Even if you have a full waffler of bad 8 cores and lets say that wafler have 150 dies you can still make a waffler with 300 4 core dies for the same price.

I dont have any information but my guess is that the demand for the 4c8t cpu will be very high if the price is the rumored 150us and many more are waiting the 6/12. So if AMD wants to supply this hypothetic demand they will have to have more bad dies than good ones. My guess is that the 4 core die will be use(with some cuts) on their APUs.

 

[3dilettante]

No1 is questioning whether or not AMD will re use bad dies but that all the supply will come from then is another completely different story. AMD could use the worst dies from the server side to power the customer 8 core and reuse or disable bad dies to feed the 6 and 4 core line. But to have enough supplies of bad dies to feed the 6 and 4 core lines(which have higher demand) is questionable or you have a really big problem.

What is enough, other than AMD is able to sell all they make at the highest price they can manage? Raven Ridge and below is what is supposed to care about the volume/mobile market. What segment is clamoring for quad-cores with no graphics, and where does it rate against mobile/corporate sales that lean heavily on integrated graphics?

The reuse of bad dies prevent loses but does not make making the cpus any cheaper per se.

Salvage effectively does. The alternative is that all good dies are priced to make up for the wafer cost of the silicon that is thrown away.
Other tweaks, like selectively disabling parts of otherwise good dies for segmentation can save on having multiple unique chips, which have up-front and ongoing manufacturing costs versus having one design's unique costs.

Even if you have a full waffler of bad 8 cores and lets say that wafler have 150 dies you can still make a waffler with 300 4 core dies for the same price.

One rumor is that SR7 is $300+, so double the price of SR3.
150-(X+Y+Z) SR7 @ $300 + X SR5 @ (200?) + Y SR3 @$150 + Z discarded @ 0.
versus
300-Z SR3 @150 + Z discarded @ 0.

However, that's not including that an 8-core SR die can feed into the market for professional/server, where it's 500 to 1K+.
The 4 core will yield very little in that space.

I dont have any information but my guess is that the demand for the 4c8t cpu will be very high if the price is the rumored 150us and many more are waiting the 6/12. So if AMD wants to supply this hypothetic demand they will have to have more bad dies than good ones. My guess is that the 4 core die will be use(with some cuts) on their APUs.

Are you predicting that the Raven Ridge APUs are going to be MCMs?

 

[xEx]

I'm 'predicting ' that there are a lot of poor gamers who wants to play games at a good quality and does not have 5k to throw away In a system. Not only in USA but around the world where prices of cpu compare to the income are much higher and excluding.

However if the demand for the 8 core is high then amd won't disable any of them to feed other segments with lower margins and I dont see amd having enough bad dies to feed 2 other segments.

Enviado desde mi HTC One mediante Tapatalk

 

[3dilettante]

I'm 'predicting ' that there are a lot of poor gamers who wants to play games at a good quality and does not have 5k to throw away In a system. Not only in USA but around the world where prices of cpu compare to the income are much higher and excluding.

I believe the plan is that the bulk of that market will be addressed by Raven Ridge, instead of the server chip.

 

[tunafish]

Yes Im sure there will be but I really doubt that the 4 cores will be all disabled versions of the 8 cores since the demand for the 4 core will be higher and producing only 8 core and selling them as 4 core would be extremely expensive.

The mass-market 4-core will be the APU (including versions of the APU that have the GPU disabled).

The entire Zen lineup will be cut from 2 different dies. The mask/design costs per different die have more than doubled every new generation. We are now at a point where making a new, smaller die will not save money unless the volume is huge. The few extra mm^2 of silicon over millions of CPUs is just less expensive than making a new type of die.

Intel has no 4-core CPU without a GPU simply because there is no economic sense in it. The sales would be too low to ever recover the initial cost of a different die. AMD will certainly not have one because if it makes no sense for Intel, why do you think it would save money for AMD?

 

[Blazkowicz]

Other tweaks, like selectively disabling parts of otherwise good dies for segmentation can save on having multiple unique chips, which have up-front and ongoing manufacturing costs versus having one design's unique costs.

I was thinking of a small thing : they only have one 14nm CPU die, so the foundry only has to churn out the same die over and over again with no retooling for runs with a smaller die. So maybe they can ask for a bit smaller price on wafers. High volumes of a single die.
Anyway, starving gamers may go for the Athlon 960K made on hopefully cheap by now 28nm then upgrade later.

 

[hoom]

Do any of the articles about Zen have a good cache latency/associativity comparison table vs old cores & Intel?

 

[xEx]

Do any of the articles about Zen have a good cache latency/associativity comparison table vs old cores & Intel?

This one have an analysis of the cache but its in spanish.

https://www.informaticapremium.com/blog/amd-zen-cache-informaticapremium/

 

[hoom]

thks

 

[xEx]

In gamer nexus last video they put the msi board to be release at the end of February so logically zen will be lunched at the same time.

Enviado desde mi HTC One mediante Tapatalk

 

[entity279]

Stepping F4 ES reaching 3.6/4.0 Ghz . Personally I it's more than I've expected for the 8C model. Here's hoping it will get sold at this speed, regardless of the TDP

https://twitter.com/CPCHardware/status/817044837358780416

 

[Malo]

Stepping F4 ES reaching 3.6/4.0 Ghz . Personally I it's more than I've expected for the 8C model. Here's hoping it will get sold at this speed, regardless of the TDP

https://twitter.com/CPCHardware/status/817044837358780416

Won't there be an issue with OEMs that design their systems to specific TDP ranges when enthusiast custom builders can just overclock to their desired frequency and compensate for the extra heat etc. themselves?

 

[xEx]

With this amd is on pair with Intel in frequency. Can't wait to see benches and final specs and all features enable.

Enviado desde mi HTC One mediante Tapatalk

 

[itsmydamnation]

Stepping F4 ES reaching 3.6/4.0 Ghz . Personally I it's more than I've expected for the 8C model. Here's hoping it will get sold at this speed, regardless of the TDP

https://twitter.com/CPCHardware/status/817044837358780416

Just to be specific F4 is the OPN ref, the stepping is thought to be either B0 or B1.

 

[xEx]

Just to be specific F4 is the OPN ref, the stepping is thought to be either B0 or B1.

Sorry but opn?

 

[itsmydamnation]

Opn is the string used by amd engineering samples to identify what it is. They contain things like base and turbo clocks, core numbers amount of cache, stepping, validated or not etc