AMD: RDNA 3 Speculation, Rumours and Discussion

[Bondrewd]

That's twice the size of a zen 3 chiplet on a node that ideally shrinks things by almost half

Yeah but GPUs are super-easy to yield relative to CPUs so that's OK.

Ok, bandwidth and power are still problems

Don't worry they have nuclear solutions for both of those.
Dice have been cast, and let the best IHV house win!

For future RDNA though I can see AMD going partially, or wholly, Samsung for their GPUs

Mobile first parts (enumerated Navix3/Navix4 like N23/24) can go there but not much else.
N33 isn't Samsung despite IP living and kicking on SS nodes so that's it for now.

And it should put up a competitive fight against TSMC's 5nm and even their first 3nm

Eh, meems.
SS like to throw BS around, let's see how it actually goes.
Cuz 7LPE died, 7LPP sucked ass and 5LPE is only marginally less suck and ass over 7LPP; barely a parity with N7(p).

 

[Megadrive1988]

7nm Navi 21 is ~520 mm². Let's say the IO die (PCIe/DP/HDMI/UVD/VCE/ETC) will reduce the die by ~60 mm² (just a quick guess). That's 460 mm². At 5 nm the resulting chiplet size could be around 255 mm². Maybe a bit bigger because of the interface for chiplet interconnection. Is it really that big? At the time of RV770 AMD called it "sweet spot".

Agreed.

 

[Frenetic Pony]

SS like to throw BS around, let's see how it actually goes.
Cuz 7LPE died, 7LPP sucked ass and 5LPE is only marginally less suck and ass over 7LPP; barely a parity with N7(p).

Seems like Samsung's 5nm is rooooughly(?) nigh on par with TSMC 7nm. And Samsung's 3nm numbers look quite good in comparison to Samsung's 5nm, so... it'd be like switching from TSMC's 5nm to the same thing but with better supply maybe? Considering Intel might(?) be trying for a good amount of business with TSMC, and Apple can just afford to buy whatever, all of Taiwan probably, going for a better supply route seems reasonable. Especially as TSMC's finfet 3nm isn't even worth the initial engineering cost for a lot of things (you need to switch to GAAFET anyway so why are you doing it?).

 

[Kaotik]

Seems like Samsung's 5nm is rooooughly(?) nigh on par with TSMC 7nm.

Hm? At least according to wikichip Samsungs 7nm is supposed to be pretty similar to TSMCs 7nm, granted I'm not sure if the TSMC numbers are for N7, N7P or N7+, but still.
https://en.wikichip.org/wiki/7_nm_lithography_process

 

[Bondrewd]

Seems like Samsung's 5nm is rooooughly(?) nigh on par with TSMC 7nm

Yeah with lower yield and 2 years later.

And Samsung's 3nm numbers look quite good in comparison to Samsung's 5nm

On paper yeah but it's a new device which means PAIN for everyone involved, especially for the entire EDA ecosystem.
Stuff can and will go wrong!

it'd be like switching from TSMC's 5nm to the same thing but with better supply maybe

Depends.
AMD is very much considering outsourcing/dual-sourcing some parts from SS now a-la Polaris30 back 2 years ago.

Especially as TSMC's finfet 3nm isn't even worth the initial engineering cost for a lot of things (you need to switch to GAAFET anyway so why are you doing it?).

TSMC is projecting 3nm as the Next Big Node for them so idk.

At least according to wikichip Samsungs 7nm is supposed to be pretty similar to TSMCs 7nm

BS, we have real silicon available and 7LPP missed N7 by 20% on power iso freq.
7LPP wasn't even better than 8LPP on power, and that was a 10nm foundry class nodelet.

granted I'm not sure if the TSMC numbers are for N7, N7P or N7+

N7+ died along the way so that leaves N7p now which very much ties 5LPE.

 

[Dangerman]

I think the RDNA 3 SKU that is rumored to be 2.5x the performance of the 6900XT perhaps consists of two 80CU chiplets at 255-300mm2 with a HBM I/O Die. May keep it all under 400 watts overall and be sold perhaps as a '7900XTX'? Basically 7900 series is the double chiplets w/ HBM & 7800 is w/ cheaper GDDR memory. However I'm not sure if GDDR7 and HBM3 will be avaliable, reminder that GDDR5 came shortly after DDR3 and DDR5 which GDDR7 is almost certainly be based upon seems to be at a mature stage since DDR5 8400 kits are being launched this year and GDDR6X is well... power hungry.

 

[trinibwoy]

Ok, bandwidth and power are still problems.

Maybe higher yields with smaller chiplets will allow them to dial back the clocks. Slow and wide should be more power efficient.

 

[manux]

I think the RDNA 3 SKU that is rumored to be 2.5x the performance of the 6900XT perhaps consists of two 80CU chiplets at 255-300mm2 with a HBM I/O Die. May keep it all under 400 watts overall and be sold perhaps as a '7900XTX'? Basically 7900 series is the double chiplets w/ HBM & 7800 is w/ cheaper GDDR memory. However I'm not sure if GDDR7 and HBM3 will be avaliable, reminder that GDDR5 came shortly after DDR3 and DDR5 which GDDR7 is almost certainly be based upon seems to be at a mature stage since DDR5 8400 kits are being launched this year and GDDR6X is well... power hungry.

I bet it's for frontier, not for gamers. Chiplet makes more sense in hpc/ai loads than in gaming loads. Of course once the design exists there is nothing preventing selling some of the units in consumer form faction as well. Could be nice thing for people who use gpu's for work.

https://www.ornl.gov/news/us-depart...er-record-setting-frontier-supercomputer-ornl

 

[Bondrewd]

Maybe higher yields with smaller chiplets will allow them to dial back the clocks. Slow and wide should be more power efficient.

Oh no, no.
Their things are made for fast.

I bet it's for frontier, not for gamers

It's explicitly for hard G gaming (anything RDNA is, once and forever).

Chiplet makes more sense in hpc/ai loads than in gaming loads

It makes sense everywhere because the shrinks are just outright dying, with real world logic scaling being shite even for dense phone SoCs.
And talking about SRAM/analog scaling is basically doing warcrimes.

Could be nice thing for people who use gpu's for work.

Those people use nVidia.

 

[DegustatoR]

It makes sense everywhere because the shrinks are just outright dying, with real world logic scaling being shite even for dense phone SoCs.

It makes sense from a production point of view but this isn't what's limiting mGPU in gaming.
The scaling of a typical graphics workload on a mGPU design - which is what a chiplet design is really - isn't at all a solved problem.
And because of this it's not a clear cut just yet that "shrinks are just outright dying" simply because it is hard to tell how big of a logic overhead you will need to have in your chiplet GPU design to be even with a traditional single chip solution.

 

[Bondrewd]

mGPU in gaming.

This isn't an mGPU.

which is what a chiplet design is really

NO.
Ffs you haven't even seen just how S H I N Y HBX is.

And because of this it's not a clear cut just yet that "shrinks are just outright dying" simply because it is hard to tell how big of a logic overhead you will need to have in your chiplet GPU design to be even with a traditional single chip solution.

Please stop talking shit because your dog canned their client chiplet designs.

 

[manux]

Oh no, no.
Their things are made for fast.

It's explicitly for hard G gaming (anything RDNA is, once and forever).

It makes sense everywhere because the shrinks are just outright dying, with real world logic scaling being shite even for dense phone SoCs.
And talking about SRAM/analog scaling is basically doing warcrimes.

Those people use nVidia.

Do you want to bet? I bet chiplet is designed for frontier and could trickle down from there to pro/consumer like cards? Looser stops posting speculations and will in future back up all claims with good links to reliable sources. Leaks are not reliable source. Either way this bet goes it would improve forum by having less noise and more signal.

 

[Bondrewd]

Do you want to bet?

Why.

I bet chiplet is designed for frontier and could trickle down from there to pro/consumer like cards?

Dawg CDNA parts have no relation to client graphics anymore; they're not even under David Wang.
The actual adv pkg R&D isn't even under either of those.

 

[DegustatoR]

This isn't an mGPU.

For all intents and purposes when viewed from a graphics side it is. It doesn't matter much who does the balancing, the issues are still there.

NO.

Okay. How's that RDNA2 beating Ampere in perf/watt and just perf going for you btw?

Please stop talking shit

Right back at you.

 

[Bondrewd]

For all intents and purposes when viewed from a graphics side it is

It's not; GCD is no independent tile.
The thing's built off the same brain-juice as Genoa.
AMD loves their IP uniform and reusable.

How's that RDNA2 beating Ampere in perf/watt and just perf going for you btw?

Pretty fucking well actually.
Mobile massacre incoming (too bad about N7 supply).
I almost sharted myself looking at mobile Ampere numbers especially for mQ parts.
Funniest thing of January.

Right back at you.

lol.
Happy 500mm^2+ on N5 day to you too, fella.

 

[manux]

Why.

Dawg CDNA parts have no relation to client graphics anymore; they're not even under David Wang.
The actual adv pkg R&D isn't even under either of those.

To create accountability on what you/I claim. If you happen to be wrong the forum would have a lot less noise. And if I happen to loose, it's same effect. Based on your posts you should be 100% sure of winning so isn't this bet an instant win for you? Or are you perhaps not as sure of this as you claim? I also like game of chicken, so there is that.

 

[BRiT]

Can everyone take a deep breathe and relax some before their next post?

 

[Bondrewd]

To create accountability on what you/I claim

Nothing like that exists on the internet.

Based on your posts you should be 100% sure of winning so isn't this bet an instant win for you?

Yeah but that's boring.

 

[DegustatoR]

It's not; GCD is no independent tile.

Again, it doesn't matter much who does the balancing, the scheme is the same, the issues are the same. You will loose efficiency on a chiplet design, this is inevitable. The question is - how much silicon will you have to burn to get over that loss? And how much power will you loose to that.

Pretty fucking well actually.

As in not at all?

Mobile massacre incoming (too bad about N7 supply).

Oh, so it's still incoming.

lol.
Happy 500mm^2+ on N5 day to you too, fella.

We'll see how it will go obviously. I'm just saying that you're singing praises to something absent again while the previous part didn't exactly turned out the way you were saying it will.

 

[Bondrewd]

You will loose efficiency on a chiplet design, this is inevitable

Yeah but question is how much.
Plus that shit is baked into their PPA targets anyway; why do you even mention that at this point?

The question is - how much silicon will you have to burn to get over that loss?

HBX is cheap (as are other solutions involving fancy packaging like AIB/AIB 2.0 or that TSMC thing).
The sorta-expensive and kinda wonky part is the actual packaging routine.

As in not at all?

Very much so, even the housefire SKUs top the perf/W charts.

Oh, so it's still incoming.

Yeah, even Milan GA was pushed down a Q.

We'll see how it will go obviously

It'll work very very nice.
But first, RDNA Exynos.

I'm just saying that you're singing praises to something absent again while the previous part didn't exactly turned out the way you were saying it will.

Oh but they mostly did.
Sorry on missing on 60SM@256b mobile part, that's a binned N21.