RDNA3 Efficiency [Spinoff from RDNA4]

[del42sa]

So 15% higher clocks and half watts after the fix? Time heals all wounds.

I am not sure if this really means they have fixed anything with STRX, it just remind me when we compared big Vega64/Vega56 efficiency with Integrated Vega11/12 which was quite efficient GPU.
I am affraid itś the same case here, small chip with fewer CU can be quite efficient compared to big sized chips with a lot of CU´s

 

[trinibwoy]

I am not sure if this really means they have fixed anything with STRX, it just remind me when we compared big Vega64/Vega56 efficiency with Integrated Vega11/12 which was quite efficient GPU.
I am affraid itś the same case here, small chip with fewer CU can be quite efficient compared to big sized chips with a lot of CU´s

We’re comparing small Phoenix Point to small Strix Point. But yes it’s not clear whether this is a “fix” or just an improvement over time.

 

[Subtlesnake]

I am not sure if this really means they have fixed anything with STRX, it just remind me when we compared big Vega64/Vega56 efficiency with Integrated Vega11/12 which was quite efficient GPU.
I am affraid itś the same case here, small chip with fewer CU can be quite efficient compared to big sized chips with a lot of CU´s

Surely it's the opposite? Bigger chips can be clocked lower for a given performance level, resulting in better efficiency. I believe AMD worked to improve the efficiency of the integrated Vega solution, so it's not apples to apples with the desktop Vega parts.

 

[del42sa]

I believe AMD worked to improve the efficiency of the integrated Vega solution, so it's not apples to apples with the desktop Vega parts.

so they did with with Strix part , anyway it´s not some "miracle fix"

 

[Albuquerque]

Yeah, it'll be more interesting when we have the entire gamut of STRX parts to review and analyze. Until then, one data point is not a pattern, even if it does possibly hint at a direction.

 

[Bondrewd]

with Integrated Vega11/12 which was quite efficient GPU.

They weren't.
PPA is a triangle and those were ass wrt that.

I am affraid itś the same case here, small chip with fewer CU can be quite efficient compared to big sized chips with a lot of CU´s

I'm comparing PHX1/HWK1 to chopped (r7) STX1.

anyway it´s not some "miracle fix"

It is.
Same IP otherwise.
Very redundant cope. Please don't.

Bigger chips can be clocked lower for a given performance level, resulting in better efficiency

That's literally what they did with DT N3x.
Low voltage, low clocks, barely fits DT power envelopes!

or just an improvement over time.

There is none, no real shrink to play around.
Dead end IP doesn't magically "improve over time" nor it was ever planned to be big and relevant, just that RDNA4.5 APUs are ded.