As for the APUs and bandwidth: RDNA by itself is more bandwidth-efficient than currently used Vega+. Lets say 1,25×. Moving from DDR4 to DDR5 doubles bandwidth (2×). Infinity Cache / SLC allows to double the effective bandwidth (2×). So from the bandwidth perspective it would be possible to create (1,25*2*2) ~5-times faster integrated graphics than the current Vega+ used in Cezanne (using RDNA2/3 and standard dual-channel DDR5). I think such configuration would be more TDP-limited than bandwidth-limited.