AMD: RDNA 3 Speculation, Rumours and Discussion

[DegustatoR]

He was speaking about the presentation of 3D stacked dies, which is what will be quite probably used for RDNA3.

*For Navi 31x2. Which is just one product based on RDNA3 GPUs.

 

[del42sa]

Flip the SRAM tile on itself, put two GPU compute tiles next to each other and you have your RDNA3.
SoIC powah!

if that´s that simple ....

 

[Bondrewd]

if that´s that simple ....

Yeah.
The hard part ain't the actual system design but validation and pkg triage.

For Navi 31x2

That's just N31...

Which is just one product based on RDNA3 GPUs.

The what.
Gfx11's the IP.

 

[eastmen]

Van Gogh is probably not dead, as evidence piles up on Valve using it in SteamPal.

It seems Panos Panay ditching the SoC was the cue for Valve going forward with their handheld console.

I dunno. Van Gogh puts them on the wrong side of technology with stacked cache hitting the market.

You'd save a lot of bandwidth putting in 64 or 96 megs of Infinity cache and getting 6700 like bandwidth in a mobile soc. Stacked up it wouldn't take much room. Even the big boys have a 128megs in them for 4k. So by going with a 128 megs they could have really low cache misses for 1080p which is what i would expect a handheld to target. You can then put in slower cheaper ram

 

[Frenetic Pony]

I dunno. Van Gogh puts them on the wrong side of technology with stacked cache hitting the market.

You'd save a lot of bandwidth putting in 64 or 96 megs of Infinity cache and getting 6700 like bandwidth in a mobile soc. Stacked up it wouldn't take much room. Even the big boys have a 128megs in them for 4k. So by going with a 128 megs they could have really low cache misses for 1080p which is what i would expect a handheld to target. You can then put in slower cheaper ram

Van Gogh seems to have been purpose built for a console, thus planning stages and tapeout needed to be far in advance of the usual consumer devices so developers could get their hands on final hardware. The contract for it just lets AMD build out generic versions to sell to whoever wants to buy them as well. Thus the older tech like Zen 2 to begin with when 3 has been out for quite a while.

 

[Deleted member 13524]

I dunno. Van Gogh puts them on the wrong side of technology with stacked cache hitting the market.

You'd save a lot of bandwidth putting in 64 or 96 megs of Infinity cache and getting 6700 like bandwidth in a mobile soc. Stacked up it wouldn't take much room. Even the big boys have a 128megs in them for 4k. So by going with a 128 megs they could have really low cache misses for 1080p which is what i would expect a handheld to target. You can then put in slower cheaper ram

I think Van Gogh is supposed to be a cheap SoC, despite the 256bit bus, and that wouldn't be compatible with the 3D stacking AMD is showing at Computex.

 

[giannhs]

how feasable can be a full 3d stacked gpu?

 

[iroboto]

how feasable can be a full 3d stacked gpu?

Until you solve the heat issue not likely.

 

[Bondrewd]

how feasable can be a full 3d stacked gpu?

As in layers of logic on top of each other?
Not very.

 

[no-X]

I think Van Gogh is supposed to be a cheap SoC, despite the 256bit bus, and that wouldn't be compatible with the 3D stacking AMD is showing at Computex.

Van Gogh doesn't have 256bit bus, just 128bit (AFAIK the leaks were based on wrong reading / detection - it supports more channels, but the channels have halved width).

 

[giannhs]

Until you solve the heat issue not likely.

wasnt some years ago that darpa?(i think or a university) found a way to do an embedded cooling solution?

 

[Kaotik]

wasnt some years ago that darpa?(i think or a university) found a way to do an embedded cooling solution?

IBM lead team did paper on practical implenetation of silicon microchannel cooling in 2005
https://ieeexplore.ieee.org/document/1412151
https://www.researchgate.net/public...con_Microchannel_Coolers_for_High_Power_Chips
Then there's this chinese lead one from 2018
https://www.mdpi.com/2072-666X/9/6/287/pdf (PDF)
And this Intel patent
https://patents.google.com/patent/US7957137B2/en
and probably a lot more.

 

[Bondrewd]

embedded cooling solution?

Those suck and/or are too complex.

 

[iroboto]

wasnt some years ago that darpa?(i think or a university) found a way to do an embedded cooling solution?

yup, I think back in 2013, when they put the discrete GPU on top of the Xbox One processor. But decided later it was too unstable to ever turn on for release units.
MS actually started developing the technology back in 1998, when The Undertaker threw Mankind off Hell In A Cell, and plummeted 16 ft through an announcer's table.

 

[Rootax]

Now I've Jim Ross voice in my head, thx a lot.

 

[Deleted member 13524]

Van Gogh doesn't have 256bit bus, just 128bit (AFAIK the leaks were based on wrong reading / detection - it supports more channels, but the channels have halved width).

The leaks are based on a Linux boot log using Van Gogh's driver:

https://lists.freedesktop.org/archives/amd-gfx/2021-March/060563.html

[ 99.984978] [drm] Detected VRAM RAM=1024M, BAR=1024M
[ 99.984981] [drm] RAM width 256bits DDR5
[ 99.985223] [drm] amdgpu: 1024M of VRAM memory ready
[ 99.985233] [drm] amdgpu: 3072M of GTT memory ready.
[ 99.985260] [drm] GART: num cpu pages 131072, num gpu pages 131072
[ 99.985962] [drm] PCIE GART of 512M enabled (table at 0x000000F400500000).
[ 100.034916] [drm] Loading DMUB firmware via PSP: version=0x00000000

Regardless, this is the RDNA3 thread and Van Gogh is RDNA2.

 

[Kaotik]

The leaks are based on a Linux boot log using Van Gogh's driver:

https://lists.freedesktop.org/archives/amd-gfx/2021-March/060563.html


Regardless, this is the RDNA3 thread and Van Gogh is RDNA2.

It's most likely bootlogger just not understanding that DDR5 channels are half the width of DDR4 channels, thinking 4 channels must mean 256-bit, while it's really 128-bit

 

[eastmen]

Van Gogh seems to have been purpose built for a console, thus planning stages and tapeout needed to be far in advance of the usual consumer devices so developers could get their hands on final hardware. The contract for it just lets AMD build out generic versions to sell to whoever wants to buy them as well. Thus the older tech like Zen 2 to begin with when 3 has been out for quite a while.

I think Van Gogh is supposed to be a cheap SoC, despite the 256bit bus, and that wouldn't be compatible with the 3D stacking AMD is showing at Computex.

Yes Van Gogh is older but it doesn't stop a company targeting fall 2021 using a newer apu. Van Gogh could have been a place holder for development kits.

I am just saying a 2022 Van Gogh will put that product on the wrong side of technology . A rembrandt with infinity cache using 3d chip stacking next year would eat it for breakfast and would likely as a whole cost less t oimplement

 

[Bondrewd]

A rembrandt with infinity cache using 3d chip stacking

X3D for APUs is faaaaar and away.

 

[Subtlesnake]

Yes Van Gogh is older but it doesn't stop a company targeting fall 2021 using a newer apu. Van Gogh could have been a place holder for development kits.

I am just saying a 2022 Van Gogh will put that product on the wrong side of technology . A rembrandt with infinity cache using 3d chip stacking next year would eat it for breakfast and would likely as a whole cost less t oimplement

Well, a 1650 seems to be able to make do with 128 GB/s, consuming ~70 watts, albeit on a generation older process.