AMD: R8xx Speculation

I don't think ATi wants to go over 256-bit interface any time soon [again], and GDDR5 is still to grow in faster clock rates, so the memory interface debate is settled, for now.

GDDR5-based PCB is unlikely to be more simple than GDDR3 -- at least a GDDR5 device has larger pin-out, to compare, but the new auto-training logic in there definitely relaxes the trace wiring requirements.

 

Couldn't they get away with fewer pins/traces etc with the higher bandwidth?

 

If RV870 consumes considerably less power than RV770 and is otherwise basically unchanged from RV770, then I suppose there's a chance it could be this small.

But GDDR5 requires more pads for interfacing (than GDDR3) and the CrossFireX Sideport adds yet more pads, so the question is, is it possible to make these IO pads fit within such a small die if space were made for them by reducing the count of power pads?

Jawed

 

Actually, 24 ROPs could suffice already, if they aren't MC tied.

The other specs seem to be reasonable enough.

 

How do you connect 24 ROPs to a 256bit bus?

 

As in good old days - crossbar switch!

 

I think so, but it might mean sacrificing flexibility of the power plane. A large amount of the pins are just power and ground, so there's room to move on the counts. I don't know what knock-on effects that has for a die like that on the process it'll likely target, though.

 

It's almost a little boring to speculate now that GPUs have moved so far into general computation since all we can really expect is really just more general processing execution units and maybe some extra TMUs. Specialty features like custom AA or tesselation will probably only be implemented in software drivers within two generations. There's still the memory and cache architectures to consider but that's also moving in a fairly clear direction with multi-gpu layouts becoming standard.

 

Well there are always going to be the fanatical hardware enthusiasts that get excited about the different L2 cache sharing technologies etc, but for people like me, the interest shifts more to the software capabilities and how people exploit hardware with new rendering techniques.

 

Nice, that cens article is the first one I've seen mention this correctly, although they got most of their other facts wrong: GT216 will be the first NVIDIA 40nm GPU. However, it won't replace GT200, and it should be out in late Q1, not late Q2 (the latter is actually for the chip replacing GT200, so they likely just got some stuff confused). To get back on topic, presumably the roadmap calls for AMD's first 40nm chip to come out before that GT200 replacement too but after GT216, however who the hell knows at this point.

 

Isn't GT212 supposed to launch in Q1 09 too?

Are you talking about GT3xx?

 

Some rumours have claimed that, yes. But seemingly not.

No, that's H2 in theory.

 

Do you rather mean GT 212 ? And from the Elsa's slide, i think only Chuck Norris can confirm if it's 45nm or 40nm.

Do you think nV can do an GT 212 in 45nm in something like February, and with this do an GX2, to make wait until H2 and DX11 next-gen ?

 

I'm not Chuck Norris but that figure on that slide zoomed up looks more like 45 than anything else; but:

http://www.beyond3d.com/content/news/608

 

There is no real TSMC 45nm process for general-purpose logic, it's all 40nm. Whether you call it 45nm or 40nm, as indicated in the link Ail just gave, is just a marketing question. Also, I think I said "GT216" very clearly... GT212 also exists, but that's another chip obviously and presumably aimed at 2Q09 BTW, I expect GT212 to be a 384-bit GDDR5 GPU, while the DX11 chip in 2H09 would likely be 512-bit GDDR5 so as not to really overlap in the line-up immediatly (DX10.x chips would be removed from the discrete line-up 1-2 quarters later).

To get back on topic, I kinda expect AMD's first 40nm chip to be a 128-bit GDDR5 RV770 shrink, but I could be horribly off-base here. In which case, maybe that'd be RV740, or maybe they'd call it R8xx although I'd tend to believe the latter is DX11. Gah, who knows!

 

The thing that puzzles me about RV770 refreshes and replacements is that AMD appeared to be signing up to a rapid progression.

So far there's not been even a whisper about the explicit RV770 refresh. Is there going to be one?

RV740 with 128-bit of GDDR5 and 10 clusters (160/800/40), something I'm biased towards, is surely just a cheap version of HD4850 - though I'm a bit unsure what to think about RBE count - perhaps that would be maintained at RV770's count.

That would then leave a gap for a true RV770 replacement, something that's 20-50% faster (in the mould of R520->R580). Shouldn't we be expecting this either just in time for Christmas or during January 2009?

Jawed

 

Why would there be one before 40nm? AMD has better things to spend their R&D budget on than things they don't need to do and won't help them in the longer-end...

As GDDR5 becomes the norm rather than the exception, it makes sense to double the number of ROPs per MC.

A 128-bit GDDR5 RV770 on 40nm could definitely be 20% faster than RV770... (remember in that timeframe, 2.5GHz GDDR5 is perfectly reasonable and 40nm promises a pretty nice clockspeed improvement)