AMD: R7xx Speculation

[Kaotik]

There's only a little to nothing about this:
What's R6xxTM?
The TM is hardly a formatting error missing superscript, as none of the other codenames has it, if it would mean (current) R6xx Family, it would probably state so like with R7xx Family, no?

 

[BRiT]

TM as in the TradeMark symbol ?

 

[Kaotik]

TM as in the TradeMark symbol ?

None of the other codenames has it in the slide

 

[BRiT]

None of the other codenames has it in the slide

This slide?

I see the "TM" symbol in proper case/script next to "Phenom", "CrossfireX", "Overdrive", and "HyperTransport". Though nothing next to general product family lines. *shrug*. I'm not reading anything more into it.

 

[Kaotik]

Yes, that slide, what's that "TM" behind R6xx? If it's supposed to be trademark symbol, why isn't there such behind SB700, R7xx Family, RD8xx, SB800 and so on?

 

[BRiT]

Maybe it's their super secret pixie dust with all the magic...

 

[Silent_Buddha]

R6xxTexturingMonster? ATI suddenly does an about face and puts 320 Texturing/ROP units coupled with 16 stream processors.

Regards,
SB

 

[hoom]

Twin Module? ie MCM with two RV670s

 

[aca]

R6xxTexturingMonster? ATI suddenly does an about face and puts 320 Texturing/ROP units coupled with 16 stream processors.

Regards,
SB

with the 16 stream processors of course clocked at 60 GHz.
--Shader domain frequency Done Right!™©®

 

[Kaotik]

Ever so trustworthy Fudzilla reports:
http://www.fudzilla.com/index.php?option=com_content&task=view&id=4762&Itemid=1

No delays

We got a confirmation that R7xx generation is on schedule for 2008 and it won't be shifted to 2009 as many journalist believes. Many journos made the assumption based on Mario Rivas presentation at Investor days.

Mario was talking about Leo platform and showed the slide with Leo platform that has R7xx based scheduled for 2009.

According to current plans R7xx parts in a platform are scheduled for 2009. This doesn’t mean that the discrete products will be late, but at least today it looks that ATI can delved them on time, at least at some point of 2008.

 

[hoho]

I wonder why do they push back Leo with R700 into 2009 when it's main parts (GPU and CPU) should be availiable in 2008.

 

[Kaotik]

I wonder why do they push back Leo with R700 into 2009 when it's main parts (GPU and CPU) should be availiable in 2008.

Note how it says "R7xx Family", not R700, it could be similar to how R600 wasn't part of any platform, while RV670 was

 

[vertex_shader]

Note how it says "R7xx Family", not R700, it could be similar to how R600 wasn't part of any platform, while RV670 was

Than why AMD made so confusing roadmaps? now everyone talking about r700 delayed to 2009, i don't think so its good in any way for AMD.

 

[Kaotik]

Than why AMD made so confusing roadmaps? now everyone talking about r700 delayed to 2009, i don't think so its good in any way for AMD.

No idea, but it does specificly say "Consumer Enthusiast Platform Roadmap"

 

[vertex_shader]

No idea, but it does specificly say "Consumer Enthusiast Platform Roadmap"

I have no idea why they not show any discrete GPU roadmap than, things are confusing now about r700, and not in positive way from AMD aspect. (or its good when everyone talking about r700 not coming before 2009Q1? )

 

[Megadrive1988]

I'll dare guess each R700 chip has a 128bit GDDR5 controller.

not for highend.

I'd say at least 256-bit GDDR5 for each R700 chip.

 

[Kaotik]

I have no idea why they not show any discrete GPU roadmap than, things are confusing now about r700, and not in positive way from AMD aspect. (or its good when everyone talking about r700 not coming before 2009Q1? )

Just think about how everyone will be like "omg, amd/ati is actually releasing something BEFORE they planned it, not several months delays like usually" if it comes in 2008 after all

 

[ninelven]

I'd say at least 256-bit GDDR5 for each R700 chip.

Why would a gpu with 4 ROPs need 120GB+/s of bandwidth?

 

[turtle]

not for highend.

I'd say at least 256-bit GDDR5 for each R700 chip.

Why? With the bandwidth of GDDR5, especially Hynix's 1gb approach, I don't see how each chip would need greater than a 128-bit external bus. One factor would be the speed of each gpu, which if at the speed of say RV670, wouldn't need that much bandwidth. Look at the cut from R600 (512-bit, 100+gbps) to RV670 (256-bit) and see the effect. Look at the effect from the 3870 (2200mhz, 70+gbps ) to 512MB 3850 (1800mhz, 57.6gbps) ...This arch just don't need a massive amount of bandwidth to complete their tasks.

Now of course, it has been mentioned AA will be fixed in R700 (Today by Kyle [H] B, no less) so perhaps AA will put bandwidth to better use. This may be the case, but does each chip really need more than 60-80gbps? I really don't think so. 120-160gbps per chip sounds like overkill for such a simple chip with (probably) 8 ROPs.

This is of course assuming the 4 core part will use 8 RAM chips, rather than 16. With 16, even the 512mb approach should work into the near-future. The other option is of course your idea of a 256-bit connect.

EDIT: This guy beat me to the main point:

Why would a gpu with 4 ROPs need 120GB+/s of bandwidth?

EDIT2: Added some numbers.

 

[ShaidarHaran]

Why would a gpu with 4 ROPs need 120GB+/s of bandwidth?

Who says each core only has 4 ROPs? I know 4x RV630 is a pretty popular theory around here, but is ATi really this stupid? To still be using a total of 16 ROPs after all these years?