AMD: R7xx Speculation

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Going in packs of three probably doesn't make much sense. DX9 pixel shaders were all designed for dual issue vec3 + scalar or dual issue vec2s. They went with five because of vertex shaders (typical vec4 + 1) but if they were designing with only pixel shaders in mind, I would guess four (or two?) would be the ideal number since a lot of stuff could still be packed into four.

Regardless, it's extremely doubtful there'll be any change to the ALU structure this time around.

Could you please explained how 64 Stream Processor GF9600GT could match or surpass Radeon 3870 in performance; If your response is because TMU's limitation, I would agree partially.
 
http://bbs.expreview.com/thread-12644-1-1.html

GT200-VS-RV770.png


;)
 
If I understand it correctly, each of the 480 units is MADD meaning they can do multiply and add in one clock. Therefore 2 FP operations.
 
Anyone know the latency on the GDDR5 memory 4870 will use and the latency on the GDDR3 memory GTX280 wil use, and how that will affect the "practical bandwidth"?
 
U´ll see when its launched :D
e.g. some of the clks are wrong and they wrote an exact TDP (114/157W) but this isnt the exact TDP.


@G-UNIT91: No, i dont have any RV770 ES.
 
How does AMD define FLOPS anyway? Seems extremely strange.


1TFLOP = 480*1050M*2 <------ What??

R600 dispacth processor passes to shader core 2 thread batches per clock/cluster. So ATi declares its sps can (theoretically) run two threads per clock.
 
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