If there are corner cases that require significantly higher voltage than the rest of the chip, wouldn't that point to flaws in the physical design? I mean, ideally, you'd want the entire chip to be optimised to run at exactly the nominal voltage, right? I understand that's probably not possible, but is there reason to believe that AMD's GPUs exhibit more variability on this front than NVIDIA's?
If by nominal voltage you mean what the foundry gives for its process node, that's something like .7-.8 versus the 1.0-1.x volts shown for the load figures. The designs themselves may have a nominal target, although even then there are regions of the chip tuned for their desired voltage, leakage, and performance. Interconnects, memory domain, SRAM, and logic can be targeted for different levels for reliability, speed, and efficiency.
Different clock and power domains mean signals may need to be buffered or stepped up to different levels, where the requirements to make the crossing depend on how far apart the states are from one side to the other.
Then with DVFS, where one of the dynamically variable elements is voltage, there's a complex set of changing conditions for the parts of the chip that are operating together. Device variation can affect things as well, influencing the safety margin of a given circuit, and elements of the system can be sensitive to mismatches with other circuits or can suffer from aging effects like SRAM.
Then, there's dynamic behaviors that cannot be readily predicted like spikes in demand for power due to a larger number of heavy operations being issued by many neighboring units, or disruption from events like other regions coming out of gated states. Localized behaviors can take voltages closer to their thresholds, and those thresholds are subject to statistical variation.
As for whether AMD or Nvidia suffer from this more, I haven't seen a wide-scale attempt to tease this out. I know of at least anecdotal reports of Nvidia chips being undervolted and benefiting. It seems as if some architectural choices could influence how much hardware is running in parallel, and how effectively they can mitigate transients across the clock/voltage range. Perhaps one perverse scenario is that Nvidia's chips have a reduced need to drive voltages higher to overcome wire delay and can operate closer to the lower limits of the process where they can generally go no lower or lack sufficient compensation methods to stably undervolt to the same degree.