Xbox One (Durango) Technical hardware investigation

[3dilettante]

Durango's CPU cores are a bit over 100 Mhz faster.

That is about the extent of the differences within the CPU portion, and the architects of the console stated they didn't change much there.

 

[kotakaja]

hmmm interesting Leaked Slide from June 2th
Said Xbox One is 768 SPU, not SP or ALU

as we know, SPU is rumored to be back again, this time for Pirate Island/VI
based on Sea Island pdf Dec 2013, they seems back to Northern Island but this time
not based on Vector Unit, but Scalar Unit inside SPU

Anantech article about AMD older SPU from northern Island
http://www.anandtech.com/show/4061/amds-radeon-hd-6970-radeon-hd-6950/4

The solution is to shrink their VLIW5 SPU to a VLIW4 SPU. Specifically, the solution is to remove the t-unit, the architecture’s 5th SP and largest SP that’s capable of both regular INT/FP operations as well as being responsible for transcendental operations. In the case of regular INT/FP operations this means an SPU is reduced from being able to process 5 operations at once to 4. While in the case of transcendentals an SPU now ties together 3 SPs to process 1 transcendental in the same period of time, representing a much more severe reduction in theoretical performance as an SPU can only process 1 transcendental + 1 INT/FP per clock as opposed to 1 transcendental + 4 INT/FP operations (or any variations).

Norhtern Island use 4 ALU + Branch + SFU logic to formed 1 SPU

AMD Older 69xx SPU

AMD Micro 46, From Heterogeneous Coherence System, probably suggesting the same thing.
let say per EX represent 1 New Generation SPU (Scalar based not Vector unit based)
per CU = 16 EX = 16 SPU = 64 ALU

AMD Sea Island Dec 2013 PDF, already revised from July 2013
http://developer.amd.com/wordpress/media/2013/07/AMD_Sea_Islands_Instruction_Set_Architecture.pdf
http://developer.amd.com/wordpress/media/2012/10/AMD_HD_6900_Series_Instruction_Set_Architecture.pdf

ISCA 2014 will be interesting .....

 

[Shifty Geezer]

hmmm interesting Leaked Slide from June 2th
Said Xbox One is 768 SPU, not SP or ALU..

That's likely just MS's naming convention, renaming the parts of AMD's SoCs. We know what XB1's GPU architecture is.

 

[kotakaja]

That's likely just MS's naming convention, renaming the parts of AMD's SoCs. We know what XB1's GPU architecture is.

No you dont
SPU is not SP

Anantech article even describe SP and SPU
Plus it is on AMD PDF too

Seem you dont even try to open the PDF


And then AMD also joking then
to show 1 CU = 16EX
so what is your explanation ?

Did MS is Joking present at ISCA 2014
for opening Keynote ?
Did ex VP of IBM Advanced Processor is Joking using AMD term then
renaming it ?

what answer is that .... ?

 

[Shifty Geezer]

No you dont

Seem you dont even try to open the PDF

Which pdf? You didn't actually link to the slide, making it kinda hard to reference it.

And then AMD also joking then
to show 1 CU = 16EX
so what is your explanation ?

Did MS is Joking present at ISCA 2014
for opening Keynote ?
Did ex VP of IBM Advanced Processor is Joking using AMD term then
renaming it ?

what answer is that .... ?

TBH I'm not really sure what you're saying, other than apparently, which I may be misinterpreting, that you believe XB1 to be using tech destined for the upcoming Pirate Island as if XB1 is two years ahead of the architecture it is believe to be based on, or that it actually features 768x3 stream processors.

I'll leave you with this quote from the guy who designed XB1

Andrew Goossen: Just like our friends we're based on the Sea Islands family. We've made quite a number of changes in different parts of the areas. The biggest thing in terms of the number of compute units, that's been something that's been very easy to focus on.

There's plenty more info out there. XB1 has 12 CUs each with 64 stream processors (whether they are labelled SPs or SPUs) for a total of 768 steam processors.

 

[KSterson]

however you call it, stream processor, shader processor, and so on.. it's a unit. So 768 S.P.Unit.

MS did rename everything since they bought it, like you name your toys when you re a kid (and think it's invicible)

 

[blakjedi]

however you call it, stream processor, shader processor, and so on.. it's a unit. So 768 S.P.Unit.

MS did rename everything since they bought it, like you name your toys when you re a kid (and think it's invicible)

emotion engine

reality engine

retina display

air play


need more renames to make your point?

 

[DieH@rd]

I miss old fancy names for console chips in this generation.

 

[Jwm]

Slide appears to just be info we already know, using my already fuzzy eyes first line is "8 something mhz" second line is "3 something esram and 102 something" at the end. Ha!

 

[Betanumerical]

emotion engine

reality engine

retina display

air play


need more renames to make your point?

Codenames/names for chips are not the same as internally renaming every bit inside of a chip which only causes confusion then again it does mean you can claim to be different.

 

[Shifty Geezer]

need more renames to make your point?

The particular issue was MS naming the parts of their chip which weren't necessarily different from existing pieces of AMD silicon, but which lead to some confusion, especially when acronyms were changed to very similar ones used elsewhere. It's not a topic worth discussing though. Those days of confusion are over. We have a very good understanding of XB1's design because of the VGLeaks posts and the confirmation and elaboration from the XB1 hardware architects in a truly awesome, open interview.

 

[rokkerkory]

also posted in general X1 thread: From his twitter account

Phil Spencer ‏@XboxP3--

June #XboxOne software dev kit gives devs access to more GPU bandwidth. More performance, new tools and flexibility to make games better.

 

[Betanumerical]

also posted in general X1 thread: From his twitter account

This is pretty much par for the course for consoles, I think the only reason they advertise them is because there is a public perception of them being behind in power.

 

[Scott_Arm]

This is pretty much par for the course for consoles, I think the only reason they advertise them is because there is a public perception of them being behind in power.

Is it? This sounds like all of the rumours of the "opt-out" option for Kinect processing.

 

[Betanumerical]

Is it? This sounds like all of the rumours of the "opt-out" option for Kinect processing.

Continuous development of the operating system and drivers should lead to more power, less ram usage and less bandwidth usage over time this seems pretty standard to me the amount of memory, CPU time, GPU time and bandwidth that the OS uses is far from static and will drop throughout the life of the console.

 

[taisui]

just pointing out what you both said are true and they don't conflict with each other.

 

[iroboto]

just pointing out what you both said are true and they don't conflict with each other.

^ Yes.

I wonder if for those on DX12 beta with X1 would it require a new SDK as well?

 

[Pixel]

AMD Micro 46, From Heterogeneous Coherence System, probably suggesting the same thing.
let say per EX represent 1 New Generation SPU (Scalar based not Vector unit based)
per CU = 16 EX = 16 SPU = 64 ALU

AMD Sea Island Dec 2013 PDF, already revised from July 2013
http://developer.amd.com/wordpress/media/2013/07/AMD_Sea_Islands_Instruction_Set_Architecture.pdf
http://developer.amd.com/wordpress/media/2012/10/AMD_HD_6900_Series_Instruction_Set_Architecture.pdf

ISCA 2014 will be interesting .....

I browsed both pdf and didn't see the slide in either. Like Shifty said we need a reference. This jumping to conclusions reminds me of mistercteam/misterxmedia type thinking we see over and over.

 

[3dilettante]

There is actually a presentation and paper with the title in the bold text above the pic.

The context of the slide presentation around that picture is primarily focused on the memory subsystem, and almost none on actual ALU or other functional units.

One workable interpretation is that the EX units in this case are the 16 load/store units, which are relevant to memory, whereas the actual vector and scalar units are not included as being relevant.

The local store, registers, the instruction fetch path, and the coalesce unit do show up, most likely due to the memory-centric context.

 

[SlickShoesRUCrazy]

I browsed both pdf and didn't see the slide in either. Like Shifty said we need a reference. This jumping to conclusions reminds me of mistercteam/misterxmedia type thinking we see over and over.

it's exactly where it came from. mistercteam posted the same stuff on another forum I frequent.