Xbox One (Durango) Technical hardware investigation

[Kb-Smoker]

well cboat on GAF just dropped his "Pre E3 OMG Trufhfact!" post and not one word about chips or clock speeds so have to assume dead rumor


...amongst a bunch of other anti-MS, Sony neutral info.

Yeah i have yet to see anyone confirm the downclock rumor that you can trust at this point. Doesnt seem likely given ps4 is running the gpu at the same clock speed. Seems to be the sweet zone for that gpu core.

I hope we get the complete specs tomorrow!

 

[BeyondTed]

1. No that would be crazy. It just creative math to show the buses BW combined in the console. Saying 30 TB/s because you combine cache BW too is just silly. This doesn't disapprove anything.

So MS says 200 GB/Sec and someone that bashes MS makes up a rumor that it is combined and then they get to pick which BW to combine and others not to combine?

So you really think 8 years after 256 GB/Sec eDRAM that 32MB of eSRAM is now going to be half the BW? Really? Eight years later and half the BW? SRAM and half the bandwidth? The 6T SRAM horse that was beaten to death is now half the bandwidth?

Just combining that number with the DDR3 shows that rumor is fake non-sense.

2. Everything we have shows its not. Maybe we will get some more detail but a lot of this stuff is really silly. You may wish it was but we have to look at ths info we have in front of us. Its wishful thinking at best.

Really? BW going down after 8 years? Going from 90nm to 28nm and the bandwidth goes down? Going from eDRAM to eSRAM 6T and the bandwidth goes down? Going from off chip eDRAM to on chip eSRAM and the bandwidth goes down?

I know what is really silly. That BS rumor.

 

[temesgen]

It is that rumor which is obviously BS. There is a simple way to tell that the "combined bandwidth" rumor is obviously crap:

1. If the console contains the 768/7790 or any another of the other rumored variants of AMD GPU then you know that the combined bandwidth number would be in the TB/Second as those GPUs have had internal bandwidth like that for quite some time:

http://beyond3d.com/showpost.php?p=1745455&postcount=138



So a "summed bandwidth" number would need to be 20 TB/Second. So that rumor is the obvious BS here.



2. If the console contains 28 nm 6T SRAM (32MB) on the same chip then it is certainly vastly faster than the off chip eDRAM in the 360. That had 256 GB/s internal bandwidth. So there is no way a combined bandwidth number would be so incredibly low as 200 GB/s since the components are much higher BW than the 360 and the 360 combined BW was already well above 200 GB/s.

There is more than one way using creative math to come up with a bandwidth number and honestly if they tried to say 20Tb/sec nobody would believe it.

OTOH if they say 200 GB/s using some loose interpretations its close enough to reality and the competitor that none but the most technical would question it.

 

[3dilettante]

So MS says 200 GB/Sec and someone that bashes MS makes up a rumor that it is combined and then they get to pick which BW to combine and others not to combine?

The inference was drawn by comparing the bandwidth numbers from VGleaks, which have been vouched for by multiple outlets as being leaked documentation for Durango.
There is no single link that goes over 200 GB/s, and the most straightforward reconciling of the Microsoft statement and the leaked information is that they are adding links together.

So you really think 8 years after 256 GB/Sec eDRAM that 32MB of eSRAM is now going to be half the BW? Really?

This has been covered before, but the 256 GB/s figure is the internal bandwidth of the Xenos daughter die when using its color, depth, MSAA, and blending ops to their fullest capacity.
The bandwidth to the daughter die is 32 GB/s.

The eSRAM bandwidth is listed as being 102 GB/s, and it is no longer restricted to the use cases Xenos was limited to.

 

[bkilian]

So MS says 200 GB/Sec and someone that bashes MS makes up a rumor that it is combined and then they get to pick which BW to combine and others not to combine?

So you really think 8 years after 256 GB/Sec eDRAM that 32MB of eSRAM is now going to be half the BW? Really? Eight years later and half the BW? SRAM and half the bandwidth? The 6T SRAM horse that was beaten to death is now half the bandwidth?

Just combining that number with the DDR3 shows that rumor is fake non-sense.

Really? BW going down after 8 years? Going from 90nm to 28nm and the bandwidth goes down? Going from eDRAM to eSRAM 6T and the bandwidth goes down? Going from off chip eDRAM to on chip eSRAM and the bandwidth goes down?

I know what is really silly. That BS rumor.

The EDRAM 256GB/s was pretty much fake too. It's essentially how much bandwidth you'd need to do the operations the EDRAM does internally. If I recall correctly, the bandwidth to the EDRAM is about 30GB/s

7 years ago, the PS3 was 2TF, now the PS4 is "almost 2TF". OMG! PS3 after 8 years, flops are going down!! Just because some marketing person trots out a number does not mean it's a useful number.

 

[SlickShoesRUCrazy]

Of course we can see right through it but fanboy run with this stuff. "it the biggest SOC EVER in a console"

If we didnt have the 768 ops per cycle comment then i bet we would have some of the craziness in here. That pretty much confirm the leak docs.

I hope MS lets the cat out of the bag tomorrow and just releases the complete specs like they did with the x360.

Doubt they will even discuss specs. They will push 'the cloud' for pr purposes since the general public will eat it up.

 

[aaaaa00]

They were vague. They only said 5 billion transistors which they were likely talking about the entire console.

That's silly.

If they really were doing that, then they would have just added the system RAM into the total, which is at least 68.7 billion transistors by itself [8GB * 8 bits per byte = 68,719,476,736 transistors]. ;-)

 

[Grall]

So MS says 200 GB/Sec and someone that bashes MS makes up a rumor that it is combined and then they get to pick which BW to combine and others not to combine?

Of course it's combined. The numbers add up perfectly, while no available information suggests that any pool of Xbone memory alone can provide 200GB/s, by itself.

So you really think 8 years after 256 GB/Sec eDRAM that 32MB of eSRAM is now going to be half the BW? Really? Eight years later and half the BW? SRAM and half the bandwidth? The 6T SRAM horse that was beaten to death is now half the bandwidth?

Do you have any evidence that it is NOT half the bandwidth...?

Your entire rant seems to stand and fall with the fact it's now 8 years later, and assumption that it hence HAS to be faster, at which point I direct your attention over to the dusty corner over there where the Wuu is hiding out.

Game, set match.

 

[Mianca]

Yeah i have yet to see anyone confirm the downclock rumor that you can trust at this point.

The biggest argument against those downclock rumours is the way Microsoft presented the hardware at their launch event (including the after show Q&A): They REALLY stressed the MS-internal development work that went into the silicon; hardly any mention of AMD (or any other technology partners, for that matter) at all.

If their silicon had MAJOR problems, they'd have made sure to give a lot more "credit" to AMD (especially given that the risk of delivering working silicon probably isn't on their shoulders anyway - cf. Dave Baumann's hint concerning yields maybe not being Microsoft's problem, but the supplier's).

So, yeah. If there actually are yield problems, Microsoft probably isn't bothered by it.

 

[Kaotik]

So MS says 200 GB/Sec and someone that bashes MS makes up a rumor that it is combined and then they get to pick which BW to combine and others not to combine?

So you really think 8 years after 256 GB/Sec eDRAM that 32MB of eSRAM is now going to be half the BW? Really? Eight years later and half the BW? SRAM and half the bandwidth? The 6T SRAM horse that was beaten to death is now half the bandwidth?

Just combining that number with the DDR3 shows that rumor is fake non-sense.





Really? BW going down after 8 years? Going from 90nm to 28nm and the bandwidth goes down? Going from eDRAM to eSRAM 6T and the bandwidth goes down? Going from off chip eDRAM to on chip eSRAM and the bandwidth goes down?

I know what is really silly. That BS rumor.

XBox 360 had 256Gbit/sec aka 32GByte/sec bandwidth on the eDRAM, not 256GByte/sec

Of course it's combined. The numbers add up perfectly, while no available information suggests that any pool of Xbone memory alone can provide 200GB/s, by itself.


Do you have any evidence that it is NOT half the bandwidth...?

Your entire rant seems to stand and fall with the fact it's now 8 years later, and assumption that it hence HAS to be faster, at which point I direct your attention over to the dusty corner over there where the Wuu is hiding out.

Game, set match.

Considering XB360 would have had to had 8 times the bandwidth it has for that to happen, I think it's quite safe to say it's not half the bandwidth

edit:
Oh, I just realized you might have meant just the daughter dies interconnects bandwidth which was 256GBytes/sec indeed, but it was limited by 256Gbit/sec connection between the GPU and the daughter die

 

[Kb-Smoker]

That's silly.

If they really were doing that, then they would have just added the system RAM into the total, which is at least 68.7 billion transistors by itself [8GB * 8 bits per byte = 68,719,476,736 transistors]. ;-)

Shhhh! Don't give them any ideas.

 

[BeyondTed]

Don't Buy The "Combined" Rumor

XBox 360 had 256Gbit/sec aka 32GByte/sec bandwidth on the eDRAM, not 256GByte/sec



Considering XB360 would have had to had 8 times the bandwidth it has for that to happen, I think it's quite safe to say it's not half the bandwidth

edit:
Oh, I just realized you might have meant just the daughter dies interconnects bandwidth which was 256GBytes/sec indeed, but it was limited by 256Gbit/sec connection between the GPU and the daughter die

As your edit states if you look at the Xbox 360 released bandwidth diagram it does show 256 GB/Sec for the eDRAM. The 32 MB SRAM is now claimed to be on chip without the slow chip to chip link. The wired photos seem to show one bare die without heat spreader. So unless there is another die like an IBM 80 MB Power 7+ eDRAM style on the back of the board (as opposed to mounted near the CPU die in the Power 7+ module) then the SRAM is on-die. There is no sign of another chip in the wired photos so it looks like on-die is the answer.

So if the rumor (which I obviously think is not true) says Xbox One Summed BW = X + Y + Z + ... + SRAM = 200 GB/Sec and the Xbox 360 Summed BW = I + J + ... + eDRAM (256 GB/Sec) > 256 GB/Sec then the SRAM in the Xbox One has to be very slow.

But we know quite a bit about SRAM speeds. If it is 6T as rumored we can have a pretty good idea of the speeds since we have some 28 nm TSMC 6T SRAM speed data right here:

Aggregate bandwidth numbers for any recent AMD GPU are available in their OpenCL documentation.
For instance, for Pitcairn XT:
- 15360 GB/s to the register files
- 2560 GB/s to the local memories
- 320 GB/s to the constant memory
- 1280 GB/s to the L1 caches
- 512 GB/s to the L2 cache
Bandwidth to the L2 cache in GCN is bounded to the number of memory channels so I expect it to be 512 GB/s in the Xbox One.
Caches not relevant to GPGPU such as the ones inside the ROPs are not described in detail.

So for the rumor to be true it is necessary that:
1. The Xbox One SRAM would need to have seriously abnormally slow BW for a 32MB 6T 28 nm TSMC SRAM

or

2. The SRAM BW is not included in the 200 GB/Sec

As for the Nintendo Wii U gathering dust if you look at the internal power components, the die size, the power brick, etc, it is clearly in a totally different universe when compared side by side to the Xbox One main board photo at wired. The Xbox One box and the internal (and external power) components are quite comparable to the Xbox 360 original brittle lead free solder oven design and the original PS3 design. The rabid fans have already had a few rounds disparaging the size of the Xbox One chassis and the power brick. Now others want to say that the power brick is tiny. That flip flop is telling. The Nintendo Wii U is best described as compact or gently described as cute.



To get to 200 GB/Sec you need a SRAM bandwidth in the sum equation which be much lower than the absolutely lowest BW in the Pitcairn. That seems like a bridge too far.



So if one wants to argue a combined bandwidth argument at least go look at the Xbox 360 combined bandwidth/bandwidth diagram and some data on 6T SRAM speeds in 28 nm at TSMC.



As far as 8 years go a pretty good rule of thumb is that every two years you can get about 2x the performance if you beat the engineers often enough. It might be transistor count, or flops, or bandwidth, or memory quantity or hard drive density, etc.

So 8 years is 2x4 so the rough bandwidth increase could be expected to be on the order of 2^4 = 2x2x2x2 = 16x. If it is only 10x then combined 200 GB/Sec still looks abnormally low.



The GPU and CPU BW needs have certainly gone up at least 8x-10x by the worst rumors which also argues against a combined BW of only 200 GB/Sec. It screams for other BW to feed the APU/CPU/GPU fast enough.

 

[AlNom]

If it is 6T as rumored we can have a pretty good idea of the speeds since we have some 28 nm TSMC 6T SRAM speed data right here:

So for the rumor to be true it is necessary that:
1. The Xbox One SRAM would need to have seriously abnormally slow BW for a 32MB 6T 28 nm TSMC SRAM

You may want to look into the actual cache amounts for the respective items on Hornet's list and come up with a correlation between SRAM amount and bandwidth. (There's a trade-off in density and I/O porting amongst serving different functionalities).

 

[BeyondTed]

You may want to look into the actual cache amounts for the respective items on Hornet's list and come up with a correlation between SRAM amount and bandwidth.

The 512 GB/Sec Pitcairn L2 cache is 512kBytes.

The others are faster since they are replicated more often and/or are wider. I think that is the correlation to look at. They are smaller too but I think it is: replication x width x clock which determines the BW.

I believe the L2 or constant memories are the narrowest and lowest clocks, so I think 512 GB/Sec is a lowest bound for the SRAM in Xbox One.



Do you have more info on the Pitcairn L2 and L1 cache related to the BW and this discussion?

 

[3dilettante]

As your edit states if you look at the Xbox 360 released bandwidth diagram it does show 256 GB/Sec for the eDRAM. The 32 MB SRAM is now claimed to be on chip without the slow chip to chip link.

And now the general-purpose bandwidth has a 3x faster link.
The other traffic that the daughter die used to have as a special case has been moved to reside within the color and Z caches of the render back ends, which introduce compression and bandwidth amplifying measures that Xenos did not have.

So if the rumor (which I obviously think is not true) says Xbox One Summed BW = X + Y + Z + ... + SRAM = 200 GB/Sec and the Xbox 360 Summed BW = I + J + ... + eDRAM (256 GB/Sec) > 256 GB/Sec then the SRAM in the Xbox One has to be very slow.

In the grand scheme of things, 102 GB/s to a large pool of memory isn't too shabby, at least for AMD chips. Bulldozer's L3 has been benchmarked somewhere below 50 GB/s for the FX-8150.

1. The Xbox One SRAM would need to have seriously abnormally slow BW for a 32MB 6T 28 nm TSMC SRAM

Bandwidth from a memory pool is dependent on the clock speed and the width of the interface, so fixating on the fact that it's SRAM, or claiming anything about a 32MB pool is "normal" seems to be missing the point.
The table you list shows a very clear inverse relationship between the size and bandwidth of a level of the memory hierarchy, so why expect that to change when the eSRAM is 64 times larger than the L2?

As far as 8 years go a pretty good rule of thumb is that every two years you can get about 2x the performance if you beat the engineers often enough. It might be transistor count, or flops, or bandwidth, or memory quantity or hard drive density, etc.

There's been a lot of references to data from 8 years ago. Just, sayin'.

 

[Gubbi]

I believe the L2 or constant memories are the narrowest and lowest clocks, so I think 512 GB/Sec is a lowest bound for the SRAM in Xbox One.

If the memory pipe to the ESRAM had as much bandwidth as the L2s, or more, there would be little point in having L2s in the first place.

You have zero data to base your assumption on. Quoting the 102GB/s as a regression compared to 360's eDRAM's 256GB/s bandwidth is getting stupid, considering people has explained to you repeatedly that the 256GB/s number is uncompressed, raw blend bandwidth and the actual number comparable to XB1 is 32GB/s.

Today you'd never design a memory system for 4xMSAA with actual four times the bandwidth, when typically 4xMSAA yields 30% more fragments and therefore only require 30% more bandwidth. Not to mention rendering techniques has moved away from MSAA and fillrate heavy techniques.

102GB/s fits perfectly with 16ROPs@800 MHZ. It is equal to 8bytes/pixel/cycle, exactly the number AMD quotes in their optimization papers for deferred rendering: Use fewer 4x16 bit pixel formats instead of double the number 4x8 bit formats.

 

[bkilian]

I believe the L2 or constant memories are the narrowest and lowest clocks, so I think 512 GB/Sec is a lowest bound for the SRAM in Xbox One.

You can move 128 bytes into or out of the One's ESRAM per GPU clock. I'll leave the calculation of bandwidth up to the user.

On the 360, you could move 64 bytes into the EDRAM per clock.

 

[3dcgi]

the msaa thing is kind of pointless anyway, afaics everybody agrees msaa is basically dead, it's all post processing aa towards the future now. maybe in an ideal world you'd want that option but it's nothing to lose sleep over giving up.

MSAA isn't pointless it's just not the only game in town. I bet it will still be used next gen.

The EDRAM 256GB/s was pretty much fake too. It's essentially how much bandwidth you'd need to do the operations the EDRAM does internally. If I recall correctly, the bandwidth to the EDRAM is about 30GB/s

256GB/s wasn't fake it just wasn't going to be maxed for any period of time since it required 4xAA and blending to max it out. The bandwidth between dies is irrelevant as it's equivalent to an internal bus if the dies were combined. It's the bandwidth to memory that matters. The between die bandwidth was effectively compressed for Xenos as it was quad bandwidth and "final rasterization" happened on the daughter die.

 

[BeyondTed]

To avoid replies to each of the last three posts I will put a couple things here:

1) If you guys have inside information on how many bytes per cycle for Xbox One then I obviously can't debate you without inside information. You might be right, I have no idea without inside info. If you don't have inside information then I am not sure how you can make your assertions or if you are right. Perhaps you can explain your source of info. How do you know that to post it?

2) Many of you seem to be assuming that the 32MB is setup like L3 cache. I have no inside information and I am not making that assumption. I could be wrong, obviously.

3) My assumption is that it is more likely that the 32MB is made up of many smaller sub-blocks hence the (width x clock x replication) makes the L3 cache like (or BW inversely proportional to size) argument possibly quite wrong.

So I am assuming for energy efficiency they did something different than just a L3. I am assuming it is more like smaller blocks distributed with each CU and/or perhaps each CPU hence the x replication factor (as seen in the Pitcairn BW numbers) will result in much higher bandwidths than one huge/32MB block.



I am under the impression MS (and others) have been looking into energy efficiency quite a bit. Including different ways to do things for much better effect per J or per watt.



So if you have inside information that it is one big L3 block with BW inversely proportional to size then the debate is pointless as I have no access to that info. You could be right and I obviously would not know that.



This thread is "technical hardware investigation (news and rumors)" not "bash the technical hardware investigation with inside information or assertions of how the SRAM is configured and used which, as far as I know, no concrete information has ever been released by MS.



People making assertions repeatedly like they have inside information on the design will not sway me much as I see no references nor do I really believe that they have that inside info. I see no references at all. If you want to say "I know this for a fact but can't talk due to NDA" fine.

 

[Cali3350]

Given that Microsoft was apparently having yield issues, I'm more than a little surprised they are launching in 21 countries this year.

I hope this doesn't lead any credence to the down-clocking rumor.