I've been saying it for more than 2 years now. If ImgTech gets it right, they'll kill everyone performance wise.
Given the history, I don't think they'll ever get it produced on time, but if Series 5 has these features:
DX8.1 features (more on this later)
Decent Anisotropic filtering without too much perf hit.
MS FSAA (FSAA4Free) with at least 4 samples (8 or 16 would be absolutely killer).
Then they could compete. DX9 would be much better, but realistically no games will use that for 2 years anyway.
With this and enough pipelines to saturate fast DDR on a 128 bit bus, they will have better performance than NV30/R300. Maybe not without FSAA on, but with it on the design should kill everything else.
No extra memory used, very slight extra texture bandwidth (on edges), means nearly free FSAA perhaps up to 16x.
However, as we learned from Series3, fast FSAA isn't worth that much if you don't also have fast Anisotropic filtering. Also, the Series 3 2D performance isn't that good (scrolling is notably lagged, and it doesn't drive 1600x1200 with that good of 2D quality, not nearly as good as my old Radeon (original). Then again, Nvidia's 2d quality is also relatively lame, but their performance is better.
Some talk of the extra memory used to bin the geometry, but this is MUCH smaller than the Zbuffer size used by an IMR doing MS FSAA at good resolution.
If Series5 used DDR2, then it most certainly could get away with "just" a 128 bit bus. No Zbuffer + only writing to the framebuffer once per pixel per frame saves a ton of bandwidth and frees that up for insane bandwidth requirements for texturing with insane fillrates.
However, given their track record, some day it will come out and we'll think "wow that would have been cool last year, at least its cheap and good enough to reccomend to bargain hunters"
I hope that isn't the case, but I've been dissapointed in the timing and release for Series 2 , 3, and 4 on the PC market so why get my hopes up for Series5? Well, because I want a R350 class performing part at R200 prices.