RDNA4

That implies the projected PPA would have destroyed Ada. Unless you’re using “dogshit” very liberally.
With that fmax juice, the only thing that would have been destroyed would be the power efficiency)
Exactly the reason why neither AMD nor NVIDIA went for this. As for the fmax, to what does the 4090 overclock under nitrogen, over 4 GHz? It seems Ada has left more juice spilled on the table, given the max OC frequencies
 
this is extremely silly to say mere weeks before the big kaboom
The big kaboom does not matter at all as I was talking about current products.

The thing'd better be well-architected. Simply relaxing the timings will hike the power, possibly with minimal performance returns, despite the high frequencies.
 
Is the reason we're discussing RDNA 3.5 in the RDNA 4 speculation thread because RDNA 4 is that far out? Isn't the idea that 3.5 is an APU revision designed to maximize performance per area, but RDNA 4 is a proper "next gen" architectural update for discrete GPUs.

If RDNA 3.5 is stripped down for PPA in APU and power constrained environments, it must make sacrifices I wouldn't expect in RDNA discrete implementations. So, how much can we hope to extrapolate for RDNA 4 from this ballyhooed Strix launch we're counting down to. And, is RDNA 3.5's advent a sign that RDNA 4 is delayed, or simply a forked revision for a different market (APUs, etc.)?
 
Is the reason we're discussing RDNA 3.5 in the RDNA 4 speculation thread because RDNA 4 is that far out? Isn't the idea that 3.5 is an APU revision designed to maximize performance per area, but RDNA 4 is a proper "next gen" architectural update for discrete GPUs.

If RDNA 3.5 is stripped down for PPA in APU and power constrained environments, it must make sacrifices I wouldn't expect in RDNA discrete implementations. So, how much can we hope to extrapolate for RDNA 4 from this ballyhooed Strix launch we're counting down to. And, is RDNA 3.5's advent a sign that RDNA 4 is delayed, or simply a forked revision for a different market (APUs, etc.)?

If there’s any truth to the below then 3.5 may provide some hints on where 4 is heading.

The whole gimmick of how AMD runs their client roadmap is building tiny speed daemon shader cores and spamming them to victory.
 
but RDNA 4 is a proper "next gen" architectural update for discrete GPUs.
It's also for APUs.
Now, well, dead, APUs. Kraken1/2.
PPA in APU and power constrained environments
GPUs are inherently power constrained environments!
All of them, down to the last one.
Area now even more so that cost per mm^2 goes up each node.
And, is RDNA 3.5's advent a sign that RDNA 4 is delayed, or simply a forked revision for a different market (APUs, etc.)?
It's just a tiny half step, was never supposed to last into 2025.
4 has no relation to 3 really.
 
There's two extra dies there on Strix Point with "N4X" listed on the bottom, big Zen 5 8 core CPU die on N4X is not something I'd expected.

Regardless, there indeed is improved clockspeeds, 2.8ghz reliable yield on RDNA 3.5 APU (vs 2.5ghz for desktop GPU for 3).

Also, STRIX HALO DESKTOP BGA PACKAGE YEEEEEEEES, victory dance :runaway:
 
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Price points of the APUs will be interesting, how close Strix Point will be to low end discrete and Halo will be to more mid-range offerings. Guessing it's finally a shared L3 cache this time instead of CPU exclusive with the expected perf gains and increased bandwidth requirements?
 
I thought that was for the NPU Microsoft seems to demand for future Windows (probably to analyse people's emotional reaction to windows ads:)
NPU will quite surely live in the I/O die on chiplets products
 
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