Predict what processor will be used for the Xbox 360

[bbot]

My prediction for the processor for Xbox is:

PowerPC 970MP.

The dev kits already use two PPC970's. And nytimes quoted an IBM exec as saying that the cpu will be dual-core.

 

[PC-Engine]

I say tricore (two PPC and a PPU).

 

[hey69]

tricore ppc derative with a bunchof celltech inside (i'm no expert on this field so yeah 8) )

 

[London Geezer]

My prediction for the processor for Xbox is:

PowerPC 970MP.

The dev kits already use two PPC970's. And nytimes quoted an IBM exec as saying that the cpu will be dual-core.

Why do we have to predict? Don't we know already? Or has it not been confirmed that it's a 3-core PPC (whatever variety of the PPC architecture)?

 

[j^aws]

My prediction for the processor for Xbox is:

PowerPC 970MP.

The dev kits already use two PPC970's. And nytimes quoted an IBM exec as saying that the cpu will be dual-core.

You are taking the piss right? How many freakin' threads have you started on the exact SAME freakin' topic???

Grrrrrrr!!!

Do a search on your last 20 threads....

 

[Pugger]

LB I don't think its been confirmed anywhere what type of CPU XB360 will use. All anyone has done is base predictions on the leaked document specs. I think we know more about PS3 CPU than XB360. More importantly we no very little about the GPU or the memory levels, everthing has been based on rumour and specualtion. What will be interesting is to see how Allared squares his 1TF rating at the GDC.

 

[London Geezer]

My prediction for the processor for Xbox is:

PowerPC 970MP.

The dev kits already use two PPC970's. And nytimes quoted an IBM exec as saying that the cpu will be dual-core.

You are taking the piss right? How many freakin' threads have you started on the exact SAME freakin' topic???

Grrrrrrr!!!

Do a search on your last 20 threads....

He's a red fish.

 

[London Geezer]

LB I don't think its been confirmed anywhere what type of CPU XB360 will use. All anyone has done is base predictions on the leaked document specs. I think we know more about PS3 CPU than XB360. More importantly we no very little about the GPU or the memory levels, everthing has been based on rumour and specualtion. What will be interesting is to see how Allared squares his 1TF rating at the GDC.

Oh right, i thought it had been confirmed... Well they better tell us something! this thing is coming out this year!

 

[Cobra101]

While we know the name, may very well know what it looks like, I am surprised nothing concrete has been leaked in regards to the CPU.

Has to some sort of tri-core design. 3 separate chips would be to costly me thinks.

Man, less than 3 weeks to the XBox unveiling and 3 weeks from today for PS3.

The wait is unbearable.

 

[Megadrive1988]

modified, streamlined Power5+ 4-Chip MCM - 8 actual cores - 16 threads

8 MB of L2 cache - 1 MB per core (2 MB per chip/die)

no L3 cache.


haha, I wish.

 

[Vaan]

Dual modified 970 cores + 1MB L2 Shared between the 2 cores and the GPU.

 

[Pozer]

While we know the name, may very well know what it looks like, I am surprised nothing concrete has been leaked in regards to the CPU.

Has to some sort of tri-core design. 3 separate chips would be to costly me thinks.

Man, less than 3 weeks to the XBox unveiling and 3 weeks from today for PS3.

The wait is unbearable.

I doubt there gonna start talking about cores and chip details on MTV. I think we'll see that info around e3 and leaked from a dev at that.

I dunno about a tri-core design. Although if anyone can do it its IBM thanks to that big Sony investment. I'd be happy with a dual-core PPC and a PPU. Wasnt one of those tri-cores gonna double for Geometry too?

 

[Carl B]

I dunno about a tri-core design. Although if anyone can do it its IBM thanks to that big Sony investment. I'd be happy with a dual-core PPC and a PPU. Wasnt one of those tri-cores gonna double for Geometry too?

Humorous observation. That would certainly be bitter irony for Sony if true. Still, considering how Sony was investing in the East Fishkill's 65nm expansion, and had an agreement with IBM for rights to some of the capacity, I have to wonder how much of the Sony IBM investment could actually turn around and benefit Microsoft as far as fabbing.

 

[Inane_Dork]

My two (uneducated) guesses about the tricore thing is that the space for the 4th core will be taken up with cache and that the CPU will be quadcore but with one bad core.

 

[Urian]

A Custom processor derivated from the Antares (PPC 970MP).

PPC 970MP= 4 Integer Units, 4 FPU Units and 2 VMX Units.
PPC X360= 3 Integer Units, 3 FPU Units and 3 VMX Units.

 

[Brimstone]

My wild guess is the entire design is built around the microthreading concept.




A Microthreaded Chip Multiprocessor with a Vector
instruction Set

Abstract
This paper describes a microthreaded, multiprocessor and presents simulations from a single processor implementation.The microthreaded approach obtains threads from a single context and exploits both vector and instruction level parallelism (ILP). Threaded code can be generated from sequential code, where loops may be transformed into families of,possibly dependent,concurrent threads.Instruction fetch and issue are controlled by statically labelling instructions for vertical or horizontal transfer, depending on whether a potential data or control dependency exists. Horizontal transfer is the deterministic component of conventional next instruction processing (increment PC or unconditional branch). Vertical transfer is a context switch, which executes the next instruction from a ready thread. This allows non-determinism in data access (cache miss or signalling between concurrent threads) and in control (all conditional branches are labelled vertical). The paper will outline the microarchitecture, the thread creation mechanism based on a vector instruction set and the synchronisation techniques used. It describes a novel approach to dynamic register allocation that supports regular dependencies between families of threads. We present simulation results for a simple 5-stage pipeline, using a three level memory hierarchy. We have measured the influence of two parameters, cache delay and number of registers. The results show that the microthreaded performance is significantly superior to the conventional pipeline on which it is based. We show that the microthreaded pipeline can achieves an IPC of 0.8, even in the presence of a 1000 cycle L2-cache miss penalty.

 

[Nappe1]

2 x CMOS Tech 6510, 1x VIC III, 2xSID_II and Victor "Invincible" 2 SOC incoporating 4 x CIA with timers.














sorry, couldn't resist.

 

[Titanio]

What will be interesting is to see how Allared squares his 1TF rating at the GDC.

In the context of PR, it's not that "wild" a figure. The GPU can be used to ratchet up flop ratings a lot.

Rumours haven't really let us down yet with X360, so I'm gonna go with a ~3Ghz tricore chip. The cores are probably similar to the PPE in Cell, with tweaked VMX perhaps.

 

[blakjedi]

if the XeCPU and the Cell chips were clocked at exactly the same rate either both 3 GHz or both 4 GHZ which chip would be more powerful? my guess (uneducated at best) is that you could "more" with the XeCPU.

Also can VMX units be dual issue?

 

[London Geezer]

if the XeCPU and the Cell chips were clocked at exactly the same rate either both 3 GHz or both 4 GHZ which chip would be more powerful? my guess (uneducated at best) is that you could "more" with the XeCPU.

What makes you think that?
If there is one thing that's for sure, Cell will be hard to beat.
Anything could happen though. And it still has to be seen what each CPU will have to take care of.