Predict: The Next Generation Console Tech

Status
Not open for further replies.
... but the fooking screen is so small ! (unless they want to play on a large screen when docked).
This. They added a TV out to PSP which enables games to be played on TV, only in titchy resolution. If the handheld were capable of rendering proper TV resolutions, it'd look much better on the TV.

It doesn't quite make sense. The idea of taking a portable console around to a friends house is torpedoed by four problematic issues.
Hmmm, better build some torpedo nets! :D
Firstly: The more they sell the more likely your friend has one and therefore the utility of portability to plug into TV at your friends house is gone as soon as they get one themselves. So if they are remotely successful then this feature starts to become useless.
To a degree, although him having a PS4P won't help you carry over your games from your PS4 to his house. Plus in order to become popular, you want some features. People taking their PS4Ps around and plugging them into other people's TVs will advertise them very well.

Secondly: It destroys the utility of a handheld. If its designed to be plugged into a socket then its going to be pretty useless as a handheld game device by design.
It'd be a compromise (okay, on paper a technically impossible one unless we have a hulking external battery pack!).

Thirdly: Cooperative gaming isn't exactly at a high point when considering local play. This is especially the case when designing games for a single user handheld device.
You could have games designed for PS4P, and games designed for PS4, the latter having all the multiplayer abilities on the PS4P. Or, you could buy Patapon and play it on either flavour of the two consoles, but it's a better fit for PS4P, and you could buy Move Sports and play it on either flavour, only you'd need the PS4P to be connected up to a TV, and you could buy GOW4 and play it on either device, but it'd be better on the PS4 proper.

Fourth: It already competes with both Sony's own console offering and their competitors console offerings as well. They already have a PS2 which fits this role better than a PSP2 ever could.
Except a PS2 can't play you PS4 games and can't be played on the Tube or at the busstop.

It makes sense to have a handheld which carries its own HDMI power adapter, especially if it can draw power through that same connector but it doesn't seem to make sense to go much further than that. It has to be a handheld first and foremost and everything else has to just be increased utility.
I wonder how true this is? Note I'll grant my grand vision of the future has been brutally cut down by Laws of Physics, but does a handheld have to be a handheld first and foremost? If PS2 could be shrunk to the size of a PSP somehow still accepting DVDs, would it hurt terribly to add a screen and create not a handheld gaming machine, but a portable console? Where you can play your games at home, and then take them on the move, and then carry on when you got home again. At the moment handheld gaming is different games to home gaming. I think a continuous gaming experience has its place if it could be achieved at all.
 
Hmmm. I was going by this article which quotes the power consumption for the A8 at <0.59mW per mhz.

0.59 * 600 = 354mW

But maybe that figure wasn't a peak figure...or maybe it's just plain incorrect? I've no idea what typical mobile CPU power draw is like, I went looking for the 3GS's to get an idea, and that's the first set of numbers I came across...

edit - it doesn't seem crazily out of whack with the kind of numbers quoted in the other B3D article I linked to in my last post either, which says 'full-system power consumption of ~3W' for a symbian s60, for example (suggesting chipset consumption in these kinds of phones is sub-1W). Now it may be I'm totally misunderstanding how this stuff works..(?) :|

First of all... this might be helpful...

http://processors.wiki.ti.com/index..._Spreadsheet#Section_E:_FULL_CHIP_POWER_TALLY

It allows you to calculate power consumption numbers for the CortexA8 included in the OMAP3 line, NEON SIMD included, and other components of the OMAP3 SoC.

At 750 MHz and with 90 % utilization of the ARM core we get about 0.9W (~1W if you consider 100% utilization) using that XLS file... assuming I am using it correctly.

At 500 MHz the power consumption is almost half that so... it is possible that with some custom work you might be able to raise the clockspeed without raising voltage as much.... as it is happening in that chart (higher than linear scaling in power consumption).

cell-8.gif


Let's start from this again... I think that is the Schmoo plot for the 90 nm SPE's. Let's take 1W for the lowest combination of frequency and voltage available: 2 GHz and 0.9V.

(another thing to thin about is that big savings for a mobile CELL will come from the shift from XDR to a more power efficient but less performing alternative and the FlexIO connection to the rumored SGX core might receive a downgrade in bandwidth too... although I hope they fix the CPU <-- GPU bandwidth over the few MB/s mark... especially since PSP2 will likely be a UMA solution... still my point is this: between external I/O interfaces and memory I/O a mobile CELL could save a lot of power compared to PS3 CELL)

Going from 90 nm to 65 nm the over-all power consumption for the CELL chip went down by 19% and going from 65 nm to 45 nm power consumption went down by yet another 40%.
CELL is probably already going the 32 nm shrink route and testing the 32 nm manufacturing process with a small and higher yield mobile processor like what the PSP2 needs could help to make the case for mobile CELL in PSP2. So we could see another power consumption drop that we still need to consider... say 30%?

1W -> 0.81W -> 0.486W -> ~0.34W for the "made up" 32 nm version (are real numbers available?)... the original 1W per SPE was the 2 GHz power consumption at 90 nm, just to think about that value again.

I also doubt that the PSP2 processor will push for >1 GHz clocks... it might even be happy with 800 MHz or less (4 SPE's at 800 MHz pack a lot more punch than any other mobile CPU planned in the near future). Even if the iPhone 4G goes with the iPad's A4 at 1 GHz, a 4 SPE's powered PSP2 CPU might even be happy with 600 MHz for the CPU and still have a lot of performance headroom over the A4 to be able to stand more iPhone specifications upgrades (4G, 4GS, etc...).

So, 800 MHz... say that we cut that number in half from its 2 GHz power consumption? We are being conservative, looking at that schmoo plot again and the power consumption difference between 2 GHz and 4 GHz... which doubles with the doubling of frequency... except when we talk about rising voltage, in that case the power consumption at 4 GHz is 3x than at 2 GHz... so we could get even less than that by lowering the voltage.
So, maybe a 0.1W per SPE solution at 32 nm is possible.
Let's say that the main CPU core chosen takes another 0.1W... 0.5W for 4 SPE+main CPU core.

It does not seem so far fetched, but maybe I am missing some major details here and people with more insights on the matter can spot the many mistakes made.

A CELL based CPU would work very well alongside a PowerVR TBDR... most of the vertex work could be done by the SPE's (thanks to years of experience with EDGE libraries and other solutions, developers are accustomed to do vertex work there) and let the SGX do what it does best: HSR and pixel shading (mostly as I do not think the USSE2 pipes would be used for pixel shading only.)
 
Last edited by a moderator:

Thanks for that, it's as sound as analysis as I've seen.

But if 4 SPEs at 65nm, at 2Ghz, should only take 0.81W per SPE, the 10-20W range quoted for the SpursEngine at 1.5Ghz (65nm) seems rather high. 0.81*4 = 3.24W...that seems way out of whack with the 10-20W the SpursEngine draws. I know the SpursEngine has other logic on it, but on the flip side it doesn't really have a main core in the sense of a PPE.

Maybe Toshiba is just really bad at power management? :/

In a hypothetical PSP2 Cell chip I'd agree you'd see a much smaller 'ppe', and I agree they'd like also make changes on the memory interfaces which might see good gains (the memory interfaces, btw, are apparently what's holding back better die-size reduction in the 45nm shrink), but I dunno if it'd all balance out to a low consumption.

I would much rather prefer your derivation of course :) I'd love to think consumption could come down like that. It'd be neat if only because we might see what a (very custom) Cell based game system 'today' would look like, taking on board the experience with PS3 and how developers are using PS3.

I'm a little more open minded about the feasibility of it now, but still skeptical also...
 
Great analysis Panajev.

What are the chances that 1 SPE will be reserverd for Hypervisor again? :D
edit- and if so, why dont they make one custom SPU that runs on lower mhz?
 
Last edited by a moderator:
Great analysis Panajev.

What are the chances that 1 SPE will be reserverd for Hypervisor again? :D
edit- and if so, ehy dont they make one custom SPU that runs on lower mhz?

High, considering the HV worked very well in PS3 although that would be quite a bit of resources wasted there are other elements to consider:

1.) publishers want a secure and piracy hardened DRM solution in place.
2.) Linux will not be available for PSP2 (not likely).
3.) PSP2's HV and overall security have the lessons learned hardening PSP iterations against piracy and hacks as well as the various attacks pirates are attempting or could attempt at the current PS3 HV.
 
Great analysis Panajev.

What are the chances that 1 SPE will be reserverd for Hypervisor again? :D
edit- and if so, ehy dont they make one custom SPU that runs on lower mhz?

Given the rampant PSP piracy, I'd say a separate security processor on the SPE with improved hypervisor will be necessary.

This. They added a TV out to PSP which enables games to be played on TV, only in titchy resolution. If the handheld were capable of rendering proper TV resolutions, it'd look much better on the TV.

If they want to show the output on a TV, besides the TV out, I wonder if it's feasible to add PicoP now:
http://www.pcmag.com/article2/0,2817,2242734,00.asp
 
High, considering the HV worked very well in PS3 although that would be quite a bit of resources wasted there are other elements to consider:

1.) publishers want a secure and piracy hardened DRM solution in place.
2.) Linux will not be available for PSP2 (not likely).
3.) PSP2's HV and overall security have the lessons learned hardening PSP iterations against piracy and hacks as well as the various attacks pirates are attempting or could attempt at the current PS3 HV.

If they reserve an SPE for the hypervisor, can that still run 'read-only' background OS tasks like say playback custom music during games, handling incoming phonecalls/network connections/external devices/IO to memory card and so on? In that case the SPE wouldn't be a total loss.

Could an SPE theoretically run at variable clocks like the chip in the current PSP? That seems an important power saving feature.

In general I think an SPE in a handheld could be a good idea, but only if Sony can also provide a framework for building apps 'the easy way', maybe with a mobile version of PhyreEngine coupled to an App Store style infrastructure? And it would be great if you could get a phone and a non-phone version like the iPhone/iPod I think.
 
When considering the power draw of Cell through its die shrinks to that of the SpursEngine, remember it isn't apples-to-apples; neither in theory would the previous Cell iterations be to the 32nm version. Cell the 'mainline' processor is on an SOI process, Spurs was on bulk CMOS, and the 32nm version of the standard 8-core is supposed to be on a metal gate process. There could be a wide range from additional improvement relative to a straight shrink all the way down to botched process... but I would tend to expect the former moreso than the later. In fact for 32nm precisely because of the process switch, as well as growing inefficiencies in die space, I would expect more optimization as well this go-around vs the automated shrinks up until now.

Now in a PSP2 if it were to be a 4-SPE Cell, the question would be whether it would be 32nm bulk or 32nm HKMG... anyway, for me it's "wait and see," and as for the rumor, I am not discounting it nor am I letting myself come to expect it.
 
I don't think they will use a SPE for a hypervisor any more if they do major work on Cell for a new console/handheld, it was a hack. Better to put a cheap tiny scalar microprocessor on the ringbus.
 
If true and Sony does whack a 32nm die shrunk 4 core CELL in the PSP2... then does that offer us any indication as to where they'd go with the CPU for PS4? :D

Hmmnnnn.... Intriguing question ;-)
 
I don't think they will use a SPE for a hypervisor any more if they do major work on Cell for a new console/handheld, it was a hack. Better to put a cheap tiny scalar microprocessor on the ringbus.

That might work too.

One question for the 32nm shrink, would part of the work benefit PS3 also ?
 
I don't think they will use a SPE for a hypervisor any more if they do major work on Cell for a new console/handheld, it was a hack. Better to put a cheap tiny scalar microprocessor on the ringbus.

Maybe so, but it did not sound like a last minute hack... Also, SPU HW Isolation mode is a kind of nice and well tested solution. Developing than tiny scalar micro-processor might generate other trickling down changes that would add to R&D costs more than wasting a bit of die area.
 
Maybe so, but it did not sound like a last minute hack... Also, SPU HW Isolation mode is a kind of nice and well tested solution. Developing than tiny scalar micro-processor might generate other trickling down changes that would add to R&D costs more than wasting a bit of die area.
Sony's mo has always been to minimize per-unit hardware costs, R&D and software expenses be damned.

The value of the full reserved SPE is not in saved R&D, but in the significant headroom it offers for background tasks.

I'm still bewildered by your power consumption chart btw. Where is that from? And the temperature values, are they max ambient for stable operation, or measured temps on some reference heatsink?
 
It's a schmoo plot released when Sony unveiled the Cell architecture.
Realworldtech had several articles with details on the implementation.
 
Sony's mo has always been to minimize per-unit hardware costs, R&D and software expenses be damned.

The value of the full reserved SPE is not in saved R&D, but in the significant headroom it offers for background tasks.

That too, especially if those BG tasks are kept clean and do not pose a security threat to the HV and to the whole Isolation mode set-up.

I'm still bewildered by your power consumption chart btw. Where is that from? And the temperature values, are they max ambient for stable operation, or measured temps on some reference heatsink?

http://www.realworldtech.com/page.cfm?ArticleID=RWT021005084318&p=8
 
Hmmm. I was going by this article which quotes the power consumption for the A8 at <0.59mW per mhz.

0.59 * 600 = 354mW

Power draw isn't linear unless you are operating only at Vmin in which case don't expect much frequency. P = C * F * V * V. F ~ V (when opperating @ > Vmin). P ~ F * F * F. While it is certainly possible to design only to Vmin and rely solely on F scaling, generally that is not the case and you rely on both F and V scaling.
 
And with a game console, only load numbers really matter...

Not really, even games spend a large amount of time not in Pmax.

I have heard complaints from enough people about the battery time of such phones (I myself too have an older Windows Mobile phone, which can run out after only 3 or less hours).

Using a WinMo phone as an example of battery life is like complaining that your 150HP 1950s 3 TON V8 car gets bad gas mileage. WinMo phones have always been the worst battery life phones on the market.
 
First of all... this might be helpful...
So, 800 MHz... say that we cut that number in half from its 2 GHz power consumption?

If you are lucky as static power starts to dominate at low frequencies.

We are being conservative, looking at that schmoo plot again and the power consumption difference between 2 GHz and 4 GHz... which doubles with the doubling of frequency... except when we talk about rising voltage, in that case the power consumption at 4 GHz is 3x than at 2 GHz... so we could get even less than that by lowering the voltage.
So, maybe a 0.1W per SPE solution at 32 nm is possible.
Let's say that the main CPU core chosen takes another 0.1W... 0.5W for 4 SPE+main CPU core.

You are making the assumption that there is the possibility to reduce V further which is likely incorrect. The scaling in power you are seeing in 45nM and assuming for 32nM is largely dependent on V scaling with process and since we were already at Vmin to begin with, it is unlikely you are going to have any margin to Vmin to scale with. In fact it is quite possible that your estimate for 45-32 scaling is optimistic due to most of the voltage scaling already being consumed by the 65-45 transition and Vmin no longer scaling down with process.

A CELL based CPU would work very well alongside a PowerVR TBDR... most of the vertex work could be done by the SPE's (thanks to years of experience with EDGE libraries and other solutions, developers are accustomed to do vertex work there) and let the SGX do what it does best: HSR and pixel shading (mostly as I do not think the USSE2 pipes would be used for pixel shading only.)

Honestly, they would be better off with an ARM core or two and going to a larger implementation of the SGX than wasting the area/power on the SPUs. There's nothing that the SPUs that are going to do that will provide a benefit over a large SGX implementation. One of the reasons that SPUs provide any benefit on the PS3 is because the GPU is so substandard to begin with. With a decent GPU implementation the SPUs become more pointless.
 
Status
Not open for further replies.
Back
Top