Current Generation Hardware Speculation with a Technical Spin [post GDC 2020] [XBSX, PS5]

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If PS5 uses power consumption to determine clock speed how is that not going to result in variability among different units?
As i understand, it doesn't have a variable power consumption, but variable clock rates for the CPU and GPU. It's a fixed power usage, therefore the idea that it doesn't matter what unit you have, and where you have it.
You're talking about two different things here.
What Mat3 is talking about is variability between each chip, each can consume more or less than the next. I'm pretty sure there's methods to calibrate each one for it's properties so they will clock the same way even when the total max power consumption will wary between units, and they use adaptive "max power" based on each consoles real consumption?
Differences shouldn't be too drastic, and Sony will (or should at least) design the cooling for the worst case chips.
Didn't they do some sort of automatic calibration on each XBX SoC too? (to minimize power draw of each console?)

(sorry for possible incomprehensible post, too stoned, just got off heavy work shift)
 
I'm pretty sure there's methods to calibrate each one for it's properties so they will clock the same way even when the total max power consumption will wary between units, and they use adaptive "max power" based on each consoles real consumption?
Even if this would give consistent results initially, after a year different consoles would show different performance i guess.
So maybe they use some form of GPU load metric to estimate power draw?
 
I mean, we'll have to wait and see. This is last bit of a puzzle we have related to next gen systems so we are in for few months of disscusion. At one point we had people saying 2.0GHz is impossible and Cerny is not an idiot to design fast and narrow console, yet, here we are... : )
Other arguments were that 2.0 GHz may not have been impossible, but that there was a good chance that it could threaten the consistency of the platform, not match the competition, and be problematic in terms of design and yields.
Sony appears to have done some things to mitigate the consistency problem, although we don't have a good description of the sorts of complexities this can add to development or evaluation versus a fixed-frequency platform. The performance inconsistency in the platform is theoretically deterministic, but the set of variables that goes into that function is larger and less-understood.

We do not have platform comparisons or benchmarks, and those in the best position to know the performance deltas and their cause likely won't be free to discuss them. However, it seems from the postures the vendors have adopted and the specs that this implementation doesn't quite match the competition as far as the elements of the platform determined by 36 CUs and high clocks are concerned. Maybe more data will become available, but the current framing is whether a non-trivial deficiency is noticeable and where the floor is for the weaker implementation.

Yields and knock-on effects throughout the console like the cooling setup are either awaiting further disclosure or are unlikely to be revealed.

Perhaps we can revisit the Xbox claims about guaranteed clocks in light of some of the scenarios given like very high wide-vector CPU utilization and an atypically high GPU utilization. The details on the power delivery and cooling do seem pretty generous, but there could be more details on how those situations are handled.

It seems likely that the PS5 designers had other target elements that influenced the design, such cost, volume, or power budget. I think there's a decent chance that some of those limits were based on market projections or financial considerations by those above the hardware teams. In that scenario, the PS5's design choices may have been the best that they could do within constraints Microsoft did not impose on its project. Whether that's fully the case also depends on where the PS5's PSU, bill of materials, and case wind up.
Projections about where the process technology would be, or where other elements like DRAM or software would be in the time frame could have made 36 CUs a rational choice, but then those inputs could have been found to be mistaken after it was too late to change.


If PS5 uses power consumption to determine clock speed how is that not going to result in variability among different units?
Cerny talked about an "idealized SOC". AMD's clocking method uses activity counters and small units on the die that perform representative electrical activity to the ALUs and other units on-die. These are paired with tables that indicate how much power cost certain actions have at various system states, and that data comes from physical testing of the chip to determine its physical and electrical variation.
The idealized SOC would represent some average set of silicon properties that all chips would meet, and the DVFS system would act like all chips had those properties.
Chips with better properties would leave their performance potential untapped, and chips that failed to meet that minimum would be rejected from being in the PS5.
 
You're talking about two different things here.
What Mat3 is talking about is variability between each chip, each can consume more or less than the next. I'm pretty sure there's methods to calibrate each one for it's properties so they will clock the same way even when the total max power consumption will wary between units, and they use adaptive "max power" based on each consoles real consumption?
Differences shouldn't be too drastic, and Sony will (or should at least) design the cooling for the worst case chips.
Didn't they do some sort of automatic calibration on each XBX SoC too? (to minimize power draw of each console?)

(sorry for possible incomprehensible post, too stoned, just got off heavy work shift)
Hmm. Yes. The real questions that affect all production silicon.

On X1X they had a special hovis method. Where the board is configured and profiled to cater to each chip. I’m not sure what the extent of this is. Or if regular per chip configuration is normal. I know nothing about this area lol

if you didn’t have this method I suppose the most basic method is to have more stringent selection process around yields.

or you just develop a board that will generally meet all cases good or bad.
 
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That doesn't mean ALL games will be running at 2.23 and 3.5. When that worst case game arrives, it will run at a lower clock speed, but not too much lower. To reduce power by 10% it only takes a couple percent in frequency. So I would expect any downclock to be pretty minor.

The CPU of Series X already has the advantage of going to 3.8GHz if using 8 threads, If the PS5 is to drop to 3.0GHz in those situations then Series X will have a 800MHz advantage, which is large.

The use of SmartShift implies major shifts in clocks indeed, I fully expect the CPU to drop to 3.0GHz if the GPU is maintained at 2.2GHz.

3.5->3.0Ghz = 14%. It's even on the same page as your post.
 
Sounds like an inefficient way of producing those chips?
There's a category of production yields for silicon chips called parametric yields. This is separate from manufacturing defects that might make a chip non-functional. Parametric yields concern what clocks a chip can reach, with what voltages, and how leaky the silicon is, since variation in manufacturing can produce chips that might not meet design targets or can only meet them with unacceptable power consumption.
It's unavoidable when mass-manufacturing chips with any sort of focus on performance or power that some of them will be unacceptable for reasons other than defect. The more aggressive the standard, the more likely some chips cannot meet it.
There are many desktop and server CPU bins, which allows the sale of those chips despite not being top-tier or limiting top-tier chips from being sold separately. Also, those chips are allowed to throttle and behave inconsistently.


Consoles generally don't get to bin like that, hence why many speculated it might be more difficult to push the silicon so much further than had been demonstrated previously. The traditionally fixed performance behavior was considered another obstacle, since fewer chips are likely to hit an aggressive performance target and power budget on a sustained basis, particularly with all the safety margins that entails.
At the time, I asked the question rhetorically as to whether the high clock was compatible with the typical fixed-clock console target, and we now have the answer for Sony.

In some ways, variable clocks could give some breathing room for yields versus a chip that must sustain a clock target at all times. In that regard, the PS5 might do better than a comparable fixed-clock chip, depending on how close to the edge the silicon is pushed, or how much Sony allows the clock to deviate.
 
I just cannot imagine what ground up games for these things are going to look like. Zen2's have ~5x more performances then Jaguars they replace, this is going to be absolutely insane.

People are going on about texturing, streaming etc. and I know devs will benefit most from fast SSD, but interactivity and physics jump we are going to get will be absolutely insane.

Last gen it was all about prittier pixels. Next gen we'll get much more.
 
I find it interesting that Sony is using the small triangle argument for having fewer CUs, especially given how the PS4 was theoretically more generous in its CU allocation than strictly necessary in order to give more room for compute. Even if the Series X has more challenges in filling CUs due to small geometry, wasn't that why AMD and Sony touted asynchronous compute and new methods of using compute to improve geometry processing? Then there's all the post-processing and non-graphics compute. Is Cerny's argument now that 36 is already more than enough, or did compute not really turn out to be that big a game changer for Sony?

We've seen how far AMD went with TrueAudio next, and Sony of all vendors took a look at it and went "nope".
 
Consoles generally don't get to bin like that, hence why many speculated it might be more difficult to push the silicon so much further than had been demonstrated previously. The traditionally fixed performance behavior was considered another obstacle, since fewer chips are likely to hit an aggressive performance target and power budget on a sustained basis, particularly with all the safety margins that entails.
At the time, I asked the question rhetorically as to whether the high clock was compatible with the typical fixed-clock console target, and we now have the answer for Sony.

Well said. MS tried to address some of that variability with the Hovis method. Otherwise, the top tier chips would actually probably pull too much current at the higher voltage that the worse performers needed and create a thermal headache. Sony seems to be going one step further (or laterally, depending on your view) by allowing the peak clock to drop to stay within this power limit.
 
Because power consumption is dependent on workload... and workload is the same on every console running the same code!
Power consumption is dependent on workload and chip "quality", which is why same code doesn't produce same power consumption on every console. Leakage affects both how high you can clock the soc and how much voltage each soc requires for said clocks.
 
We've seen how far AMD went with TrueAudio next, and Sony of all vendors took a look at it and went "nope".
Did they though? They do list audio as one of the things you can do on PS5 with raytracing if you want, and I'm pretty sure that's gonna run on CUs instead of Tempest (and that was one of the primary things in TrueAudio Next, the raytraced audio, now they just have acceleration for it too)

(edit: fixed typo they > the)
 
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@3dilettante Thanks for the in depth explanation! The PS5 could be cheaper to manufacture in the long run, it's a smaller chip, smaller nodes, say 5nm could help production.

I just cannot imagine what ground up games for these things are going to look like. Zen2's have ~5x more performances then Jaguars they replace, this is going to be absolutely insane.

People are going on about texturing, streaming etc. and I know devs will benefit most from fast SSD, but interactivity and physics jump we are going to get will be absolutely insane.

Last gen it was all about prittier pixels. Next gen we'll get much more.

Star Citizen graphics/assets as baseline visuals ;)
 
@3dilettante Thanks for the in depth explanation! The PS5 could be cheaper to manufacture in the long run, it's a smaller chip, smaller nodes, say 5nm could help production.



Star Citizen graphics/assets as baseline visuals ;)
Cost per transistor isn't falling anymore, so there's less incentive to node shrink just for cost savings. Compound that with power savings, and maybe you have a case, but I imagine the node will be at least two years old before you hit the point where it makes sense.

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Did they though? They do list audio as one of the things you can do on PS5 with raytracing if you want, and I'm pretty sure that's gonna run on CUs instead of Tempest (and that was one of the primary things in TrueAudio Next, they raytraced audio, now they just have acceleration for it too)
I thought the ray-tracing was offered by a different library separate from TrueAudion Next. That would allow Tempest to interface with that separate method without using TrueAudio.
I could have missed where they discussed RT being part of the offering.

@3dilettante Thanks for the in depth explanation! The PS5 could be cheaper to manufacture in the long run, it's a smaller chip, smaller nodes, say 5nm could help production.
I'll grant the PS5 as we know it would be cheaper than a PS5 with the same headline specs without variable clocks.
There's more information we don't have that govern whether this was as successful as Sony hoped, or if in the context of the competition the difference is significant enough.
 
A few questions for anyone who know... things....

1. Is AVX256 disabled on xbsx to do 3.6/3.8 ?

2. Considering 2.23ghz is a parametric yield, does it mean a super expensive cooling solution could sustain that clock for any load? Or would it be already beyond the heat spreader capabilities (die-to-surface thermal resistance)?

3. Did MS ever mentionned the Hovis method again? Is Sony now doing this too?

I am guessing yes on the first. As for the second, I would suppose that parametric yield for ps5 have a relatively high test voltage attached, to keep a high number of passing dies. Unless rdna2 is that amazing. For the third one, only MS did the TDP roulette as far as we know, and I am curious if any journalist (the remaining ones who didn't score an exclusive coming with prewritten questions) would ask the question considering how important it was for xb1x and was presented as a mystical car reference. We know better now, and journalists should too.
 
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If fixed clocks of 2.0 GPU and 3.0 CPU were hitting a power wall, how is it possible for the variable approach to constantly keep both near 2.23 and 3.5? Doesn't add up.
 
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