Ok ... so we agree, it is a hardware feature? You need the TSS hardware to do SFS ... so it's a hardware feature.
It was in a response to some tweet that implied the feature is MSFT-specific.
Ok ... so we agree, it is a hardware feature? You need the TSS hardware to do SFS ... so it's a hardware feature.
It was in a response to some tweet that implied the feature is MSFT-specific.
This guy which work on Ps5 before praise the NX Gamer video.
One interpretation of Cerny's statement about ~2% change in clocks producing ~10% in power is that the range the PS5 is operating in is past the knee of the curve in terms of power efficiency.AMD has claimed a 50% uplift in power efficiency for RDNA1 over RDNA2, to which they specifically mention higher clocks:
It remains to be seen how much of these 50% come from better IPC and how much it comes from higher clocks.
The 5700 had a typical clock (game clock) at around 1700MHz. If you consider 35% of the total 50% improvements are coming from increased clocks, then we should expect a 5700 XT equivalent card at the same power budget to be clocked at 1700*1.35 = 2.3GHz like you suggested.
I'm not quite sure how to determine what form of coherence ordering Nvidia has for its rays, but how would we know it was helpful without knowing how it performs with it on and off?1. I think NV has coherency hashing in their hw. Doesn't seem to help much though.
2. I think most of the problems with RT come from: "what to do after" rather then "how to find the intersection".
I.e. I suspect that main problems come from pretty random memory access patterns when doing any real sampling for materials on the objects.
And BVH lookup is not that sequential either.
The reference points in the +50% energy efficiency slide are the same, Vega 64 & 5700 XTAMD may not be choosing its reference points in an entirely transparent manner, just as its reference point for the GCN to RDNA transition was the 16nm Vega 64 rather than Vega VII.
And at the time that claim was made, a lot of people didn't read the fine print or had trouble finding the footnote that it wasn't the 7nm Vega VII. The choice of the start and endpoint can change how we should regard the percentage.The reference points in the +50% energy efficiency slide are the same, Vega 64 & 5700 XT
dunno who has the best explanation of the specs, but it doesn't matter. Both the PS5 and XSX were shown at a bad date with all the things going on in the world right now, a lot of technical mumbo jumbo but boring presentations. I think with a console you have to sell the hardware with a tech explanation of course but also with something more, better marketing, fun ads, etc.
Maybe the PS5 OS RAM reservation is lower than the Xbox reservation. This guy which worked on Ps5 before leaving Sony praise the NX Gamer video.
Do you think it's possible now to build a PC that will play all multi platform games decently, for the next 9 years, after we received the most important console specs? Or is there still a lot of uncertainty regarding the SSD requirements of PC versions?
And at the time that claim was made, a lot of people didn't read the fine print or had trouble finding the footnote that it wasn't the 7nm Vega VII. The choice of the start and endpoint can change how we should regard the percentage.
When AMD gave the power improvement for the Fury generation, it was even less transparent and apparently used a Hawaii or Tonga start point and apparently a mobile-clocked or Fury Nano endpoint, but implied the improvement was for the Fiji family.
The claim for RDNA2 has an unknown endpoint that could be one of the SKUs it doesn't push too far, and we have ample evidence that AMD didn't try that hard to optimize the 5700XT's voltage or clocks for power-efficiency.
One interpretation of Cerny's statement about ~2% change in clocks producing ~10% in power is that the range the PS5 is operating in is past the knee of the curve in terms of power efficiency.
He did talk about mesh shaders in all but name when he referenced the Geometry Engine and its features. We’re all wondering why he didn’t mention VRS. My guess is the interest of time. His talk wasn’t an exhaustive coverage of the GPU capabilities.Is there a reason why Cerny mentioned only Primitive Shaders for the PS5, but nothing of Mesh Shaders or VRS support in his presentation? I thought Primitive Shaders were a RDNA1 feature, while RDNA2 uses Mesh Shaders.
There does seem to be a restriction if the OS uses an IOMMU and enables virtualization-based security. It's possible the PS5 will, given the collection of other IO processors and DMA engines running freely in the SOC.
Whether Sony implements some other form of security measures around the PCIe subsystem, or the system software has other safeguards is probably something Sony wouldn't discuss. Sony has displayed surprising amounts of neglect in its security schemes before, however.
The m2 slot's PCIe link goes to the IO block on the main SOC, same as the custom SSD does.
We know that decompression and priority arbitration would be handled in that complex, and while I don't recall a mention of decryption, I think the most likely place for encryption and tamper checking is on the main SOC. That should give some defense of the data in persistent storage, barring security flaws or Sony's already mentioned neglect.
I'm not clear where the Tempest block is, or where its DMA might be.
Left unsaid is where the OS and firmware are being loaded from or into. I'd like to think Sony learned something from how stringing the boot process over the link from a separate southbridge compromised security.
We'd need to find out whether there's still a southbridge chip, since at least one of its functions was serving as a controller for the HDD, which the PS5 would have on-die.
He did talk about mesh shaders in all but name when he referenced the Geometry Engine and its features. We’re all wondering why he didn’t mention VRS.]
I’m not sure. It should have both. Geometry engine I assume is another label for Mesh shader. And VRS is VRS. You can do both to save cycles.Is there a context between VRS and Geometry Engine?
I’m not sure. It should have both. Geometry engine I assume is another label for Mesh shader. And VRS is VRS. You can do both to save cycles.
Is there a reason why Cerny mentioned only Primitive Shaders for the PS5, but nothing of Mesh Shaders or VRS support in his presentation? I thought Primitive Shaders were a RDNA1 feature, while RDNA2 uses Mesh Shaders.
.... But Xbox has harped quite hard on VRS in particular, and even called it "Our patented form of VRS", that it makes me wonder if they know something.
I think they want the discussion to be dominated by their SSD tech right now. Things like VRS, SFS etc, are all things that fall dull on ears.Yeah, it's got me wondering too. If it was merely an oversight or not appropriate for the talk, I would have expected Sony to clarify afterwards, as they did for the backwards compatibility issue.
It sure looks like an optimistic take and I would think the OS memory footprint might be conservative as it was for the PS4 at the beginning. I sure did enjoy seeing things laid out that way however and hope for the best as well.don't know if all is true, but interesting read
Might this prioritization system help if some of the OS is placed into the SSD ?The controller itself hooks up to the main processor via a four-lane PCI Express 4.0 interconnect, and contains a number of bespoke hardware blocks designed to eliminate SSD bottlenecks. The system has six priority levels, meaning that developers can literally prioritise the delivery of data according to the game's needs.
This reminds me of a discussion about garbage collection for VMs (recent vintage Java in that case ) where well managed clean up can really keep something moving reducing stalls (race conditions as well but that might not be an issue with a GPU per se)it could really hurt the GPU performance - so we've implemented a gentler way of doing things, where the coherency engines inform the GPU of the overwritten address ranges and custom scrubbers in several dozen GPU caches do pinpoint evictions of just those address ranges."