GDDR6 has 2 16bit individual channels in one 32bit connection to a memory chip, whether that chip is 1GB or 2GB in density, so it should be possible to assign one of those channels for CPU tasks and one for GPU splitting the mem chip, I don't know if more complex granularity can be done? Of course even in that scenario you cannot run max 560GBs bandwidth to the GPU anymore, but you can keep all 10 chips fully or partially active for the GPU imo.
True, you could do that, but it's just better to timeshare. The CPU just doesn't use the memory that often.
From a hardware point of view it’s possible the question is whether or not a memory controller would allow for such a split or if it would effectively enforce locking off the entire bus to a single host. It feels like it wouldn’t and you’d get either one or the other and have to time division multiplex between the two consumers.
You can just do it in software by allocating memory carefully. Half of the physical address space of the chip is on the channel 0 and the other half is on channel 1.