hoom
Veteran
Um lingo translation required 
BTW we gonna have a Zen4 thread?
Meanwhile & hardly breaking news but for the record since not previously noted in the thread:
AMD is bringing out some Zen3s with stacked L3 cache.
Bit about the tech here https://www.anandtech.com/show/1672...acked-vcache-technology-2-tbsec-for-15-gaming
64MB of SRAM stuck over the top of the existing L3 using existing TSVs & the chip is thinned so that the stack is same vertical height as the old chip.
Apparently only going to be 1 consumer level chip Ryzen 7 5800X3D: 96 MB L3 cache, 8 cores, 4.5 GHz boost
Looks like main target is Epyc/Server sockets (& presumably Zen4?) with some completely monstrous numbers of L3 on them.

BTW we gonna have a Zen4 thread?
Meanwhile & hardly breaking news but for the record since not previously noted in the thread:
AMD is bringing out some Zen3s with stacked L3 cache.
Bit about the tech here https://www.anandtech.com/show/1672...acked-vcache-technology-2-tbsec-for-15-gaming
64MB of SRAM stuck over the top of the existing L3 using existing TSVs & the chip is thinned so that the stack is same vertical height as the old chip.
Apparently only going to be 1 consumer level chip Ryzen 7 5800X3D: 96 MB L3 cache, 8 cores, 4.5 GHz boost

Looks like main target is Epyc/Server sockets (& presumably Zen4?) with some completely monstrous numbers of L3 on them.