AMD: Southern Islands (7*** series) Speculation/ Rumour Thread

AFAIK, some mixed signal ICs mix processes as analog circuits scale poorly.

 

Those "specifications" are trivially fake: TMU and shader ALU counts do not match/are not any reasonable multipliers of each others.

Those fake-slide-makers should be ashamed for making so low-qualiy fakes; they should even TRY to understand the architecture so that they could make more believable fake slides.

 

+1.
Not a very good fake effort neither, 6400 shader units is impossible for the dual card (as 4 CUs have 256 shader units and 3200 doesn't divide well by 256). The number of TMUs also doesn't really fit in any meaningful way.
And I very highly doubt AMD can increase the unit count to something in that neighborhood, those units are going to be bigger (but more efficient) so I'd really expect something more like a ~50% increase.
There is absolutely no way imho that a card with more than twice the number of shader units would have lower power draw neither, 28nm or not.
At least they managed to fake some reasonable looking numbers for ROPs and memory bandwidth, yay.
As for the Radeon HD names, I doubt that's even decided yet (though it's possible some of them will turn out correct, unless AMD changes naming scheme again).

 

You probably meant 16 ROPs there...
In any case, I think you're deducing a bit too here much from the high-end numbers which are completely fake in the first place .

I think that's possible though the chip might be slower...

I mentioned in the past that I believe Trinity is not going to exceed 8 simds (512 shader units). So if AMD is going to do a similar discrete chip it could be the same.

 

The former was what I had in mind. Is that possibly what Nvidia has done with GF11x?

 

It tells right away it's fake, since Thames is part of the mobile lineup

 

With the important caveat that, for the mixed case, both G and LP characteristics will be worse than the pure equivalent.

And it's quite a more expensive too.

 

The source of those spec is a joke post from NOVEMBER 2010 made at semiaccurate forums. They first appeared one day before GTX590 launch in march, now a second time. Will we see a third? Oh, and if the autor knew back then we would have a new architecture, I am sure he would generated something more apropiate.

 

The numbers don't quite fit the previous VLIW-5 or VLIW-4 architectures neither. But well if it never wasn't meant seriously it doesn't really matter .

 

That hasn't been my experience.

I've worked on chips where both G and LP cells were used. Partitions using G cells don't use LP cells and vice versa, and G partitions operate on different power domain than LP partition. You make sure signals crossing over from G<->LP have proper level shifters etc.

Other than these restrictions I don't know of any serious issues or drawbacks.

 

True about the level shifters. I could have sworn I saw a TSMC slide at some point about some (minor) trade-offs, but I never really checked the libraries, so I could be wrong.

 

There's a fairly high chance of that on Fermi designs, yep.

 

40LPG makes no sense here IMO. Remember that dynamic power per MHz is *lower* on 40G than 40LP (although performance is higher so power per transistor is still higher on 40G). It's low power in terms of leakage, not necessarily overall power. They need to invest more in power gating, not low leakage transistors. The same is true for AMD obviously, but that's not a very good reason to keep this off-topic conversation going

 

Agreed. It is highly unlikely that either Nvidia or AMD used 40LPG. AFAIK they both use 40G exclusively for their GPUs.

40LPG power advantage disappears pretty quickly when you push it towards higher perf since dynamic power is actually worse for comparable performance. Reason is, to get the same perf you need to drive a higher voltage and hence higher dynamic power.

Even in SoCs 40G is used for CPU and other high perf units (like graphics) for the same reasons.

 

Missed the "off topic" memo.

Sorry. Back to regular programming.

 

The source of those specs was a post by the user 265586888 at semiaccurate forums. Actually, he was just taking a stab at all those speculations floating around. It is pure irony that it was picked up as rumor.

Who should really be ashamed is the person that picked up those numbers and made the slide.

As for the other slide, it's complete bollocks as well, of course (EDIT: like Kaotik already wrote). Leaks from months ago suggest that Thames is part of the London family, the mobile variants of the upcoming SI series. Thames is also supposed to be 128-bit and lowest(!) end of the new GPUs. And ID entries in recent AMD drivers show Thames listed only a few lines above Lombok. I wouldn't be suprised at all if it turned out to be the exact same GPU, with Thames simply being the mobile variant of Lombok.

 

Nothing off topic about this subject.

 

40G and 40LP have different voltages. Is the same true for different 28nm variants? Or do they all use the same vdd?

 

Yes, it holds true for 28ns as well.

 

ISTR one of the distinctions between G and LP was strain and doping levels. So you'd need to form isolated islands and apply more steps to get both on the same wafer.

Honestly, it seems like a pretty bad idea. Are there really that many transistors that you would want on LP? You can always use high Vt devices to get some of the benefits of lower leakage.

DK