AMD: Southern Islands (7*** series) Speculation/ Rumour Thread

[Deleted member 13524]

The use of low power process sounds strange, surely that can be good enough for high end chips?

I wouldn't know, but Charlie claims it has more to do with clock speeds rather than transistor count.
nVidia's architecture uses higher clocked shaders (~1.5GHz for high-end models so far), so a process meant for ~1GHz chips wouldn't do.
AMD uses their shaders clocked at the same speed as the rest of the core, usually at <1Ghz, so they could use this process.



Then again, wasn't the A15 going to be clocked at up to 2.5GHz, using 28nm LP?

 

[mboeller]

Then again, wasn't the A15 going to be clocked at up to 2.5GHz, using 28nm LP?

hmmm...no

ARM and Cadence jointly presented a paper at today’s ARM Technology Conference discussing the steps needed to get the new ARM Cortex-A15 multi-processor core ready to run at or above 2.5GHz in a 32/28nm G/HP process technology and at or above 1.5GHz in a 32/28nm LP process technology.

but 1,5GHz should be good enough, or?

Link: http://eda360insider.wordpress.com/...x-a15-what-does-the-road-to-2-5ghz-look-like/

 

[rpg.314]

The use of low power process sounds strange, surely that can be good enough for high end chips?

It need only clock upto ~1GHz. Beyond that, if it can give a 3 month legup on competition, it's totally worth it.

 

[Jawed]

Perhaps a ~170mm² GCN chip might be credible as a pipecleaner? Or even the final discrete VLIW4 chip?

But overall the article just seems to be wishful thinking.

 

[rpg.314]

Well, if you have to clean process pipes, you would really want to keep arch the same, so may be cayman on 28nm or something like that.

But it seems like there would be no pipe cleaner this time around.

 

[no-X]

Perhaps a ~170mm² GCN chip might be credible as a pipecleaner? Or even the final discrete VLIW4 chip?

But overall the article just seems to be wishful thinking.

It's great to see you here again!

 

[Erinyes]

I wouldn't know, but Charlie claims it has more to do with clock speeds rather than transistor count.
nVidia's architecture uses higher clocked shaders (~1.5GHz for high-end models so far), so a process meant for ~1GHz chips wouldn't do.
AMD uses their shaders clocked at the same speed as the rest of the core, usually at <1Ghz, so they could use this process.

Then again, wasn't the A15 going to be clocked at up to 2.5GHz, using 28nm LP?

You do realize that you're comparing clocks across different architectures? NV's scalar architecture runs at higher clocks than AMD's VLIW architecture, and that has nothing to do with the process.

The use of low power process sounds strange, surely that can be good enough for high end chips?

Low power process need not neccesarily mean low performance as well. 28 LP should be at least as fast if not faster than 40G

Well, if you have to clean process pipes, you would really want to keep arch the same, so may be cayman on 28nm or something like that.

But it seems like there would be no pipe cleaner this time around.

I would be surprised if there was no pipe cleaner this time around, especially since there is a significant change in the process (HKMG). Of course AMD do have experience with GloFlo's HKMG process but that one is completely different compared to TSMC's process. But then again if we were looking at a Q4 release, the pipecleaner should have been out by now right? (For eg RV740 was out ~5 months before Cypress)

 

[rpg.314]

You do realize that you're comparing clocks across different architectures? NV's scalar architecture runs at higher clocks than AMD's VLIW architecture, and that has nothing to do with the process.

I think what he meant was that designs have been pushed to that range in that process.

 

[Deleted member 13524]

You do realize that you're comparing clocks across different architectures? NV's scalar architecture runs at higher clocks than AMD's VLIW architecture, and that has nothing to do with the process.

As far as I know, LP allows for lower power while HP allows for higher clocks.

I can't see how "clocks have nothing to do with the process". Why haven't we had 4GHz CPUs & GPUs since 180nm, for example?

 

[no-X]

As far as I know, LP allows for lower power while HP allows for higher clocks.

I can't see how "clocks have nothing to do with the process". Why haven't we had 4GHz CPUs & GPUs since 180nm, for example?

If I understand it well, 28nm HLP is SiON + HKMG. 40nm bulk was SiON, too, so 28 HLP shouldn't be any worse regarding clocks (no matter whether you call the process low-power, high-performance or otherwise).

 

[Squilliam]

So does that mean that 28 HLP is compatible with on die ED-RAM? I presume you're saying that it is Silicon on insulator, right?

Im just thinking in terms of future Wii U releases and future Xbox 360 revisions, so I take it that it would be compatible with both assuming the former also uses ED-RAM?

Sorry for off topic.

 

[rpg.314]

So does that mean that 28 HLP is compatible with on die ED-RAM? I presume you're saying that it is Silicon on insulator, right?

on die edram is not compatible with anything that needs to be cheap.

Besides, TSMC does not do SoI.

 

[Blazkowicz]

yes, that SiON means silicon nitrous oxide, which is unrelated.

 

[Erinyes]

As far as I know, LP allows for lower power while HP allows for higher clocks.

I can't see how "clocks have nothing to do with the process". Why haven't we had 4GHz CPUs & GPUs since 180nm, for example?

Like i already said, LP does not neccesarily mean low performance as well. 28LP should have at least the same if not more performance than 40G while reducing power at the same time. 28HP would give higher performance at the same power.

NV's scalar architecture runs at higher clocks than AMD's VLIW architecture, and that has nothing to do with the process.

That was what i said. I did not say "clocks have nothing to do with the process". I said NV's Scalar architecture is capable of running at higher clocks than AMD's VLIW architecture, irrespective of the process. For eg when G80 came out at 90nm, its shaders were clocked at 1350 mhz afaik, while the fastest AMD graphics card at the time, the X1950XTX was clocked at 675 mhz afaik.

Another example i can give you is AMD's Athlon 64 v/s Pentium 4. The Athlon 64 3000+ was clocked at only 1.8 ghz and achieved the same performance as a Pentium 4 clocked at 3 Ghz.

If you still dont understand then i dont know what else to tell you

 

[CarstenS]

It's great to see you here again!

+1

edit:
To be more productive: It isn't by all means possible to mix different process techs inside one chip, isn't it? Just to make sure...

 

[rpg.314]

+1

edit:
To be more productive: It isn't by all means possible to mix different process techs inside one chip, isn't it? Just to make sure...

AFAIK, sometimes people do do this. Of course, it has costs of it's own.

 

[Rys]

To be more productive: It isn't by all means possible to mix different process techs inside one chip, isn't it? Just to make sure...

You can mix different transistors on the same node, so 40G + 40LP for example, but not something like 40 + 28. The materials + lithography are too tightly coupled.

 

[Deleted member 13524]

Has anyone seen this?

If:
Tahiti has 3200 GCN cores 128 TMUs, 48 TMUs,
then
Thames should be 1600 GCN cores, 64 TMUs and 24 ROPs.

Meaning Southern Islands could be a 2x jump from Evergreen in the mid-high to ultra-high end.

Being VLIW4, Lombock could be.. half a Cayman? That would be 768 VLIW4 cores, 48 TMUs and 15 ROPs.

Notice how there's no info on lower end than Lombock, suggesting that graphics cards on that performance level will be replaced by APUs.

Could Trinity carry a Lombock inside? That would more than double Llano in processing power.
Imagine a Tryinity + crossfired Lombock in a laptop.

 

[3dilettante]

I think it's worth going back to the first post in this thread with the fake numbers and comparing.

 

[rpg.314]

Has anyone seen this?

If:
Tahiti has 3200 GCN cores 128 TMUs, 48 TMUs,
then
Thames should be 1600 GCN cores, 64 TMUs and 24 ROPs.

Meaning Southern Islands could be a 2x jump from Evergreen in the mid-high to ultra-high end.

Being VLIW4, Lombock could be.. half a Cayman? That would be 768 VLIW4 cores, 48 TMUs and 15 ROPs.

Notice how there's no info on lower end than Lombock, suggesting that graphics cards on that performance level will be replaced by APUs.

Could Trinity carry a Lombock inside? That would more than double Llano in processing power.
Imagine a Tryinity + crossfired Lombock in a laptop.

It's garbage. But atleast it delivers it's promise of wildness.