AMD: RDNA 3 Speculation, Rumours and Discussion

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Leoneazzurro5 said:
So, according to some leakers the very lower end of RX7xxx cards will consist of 6nm "refreshes" of the RDNA2 parts.
Click to expand...

I do think it makes sense to reuse Navi 22 and Navi 23 at 6nm, if all Navi 3x are on their way to becoming such expensive beasts.
Even if there's no performance upgrade, at least they'll have something to put inside laptops with console-like performance and featureset, using a hopefully cheap node.
 
ToTTenTranz said:
I do think it makes sense to reuse Navi 22 and Navi 23 at 6nm, if all Navi 3x are on their way to becoming such expensive beasts.
Even if there's no performance upgrade, at least they'll have something to put inside laptops with console-like performance and featureset, using a hopefully cheap node.
Click to expand...

Yes, performance-wise it would make sense, but i.e. if you consider N33 and N22, we would have an higher performing part with a smaller memory bus and possibly (if N33 follows the same trend as N23) a lower number of PCI-E lines. And I don't know how much cheaper N6 is compared to N7. Yes, it has some less passes (but it also uses EUV AFAIK) and it saves 10% of area, but after that we are looking at chips bigger than 300mm^2 and 200 mm^2, respectively, and without any other cost saving features (smaller buses, lower power consumption) compared to current line. So it may be, but it makes a lot of confusion if true.
 
6nm process is EUV, 7nm isn't. It shoudn't be possible to create 6nm Navi 2x by using just a simple optical shrink. Does it make sense to use RDNA 2 architecture to make new desing once you have RDNA 3 building blocks? Is it really so much cheaper that the architectural advantages of RDNA 3 (perf./watt, bandwidth efficiency etc.) could be outweighed?
 
no-X said:
6nm process is EUV
Click to expand...
Irrelevant; they're fully DR compatible and the migration consists of pressing 3.5 EDA buttons.
no-X said:
It shoudn't be possible to create 6nm Navi 2x by using just a simple optical shrink
Click to expand...
Yes it is.
Literally a mask swap.
no-X said:
Is it really so much cheaper that the architectural advantages of RDNA 3 (perf./watt, bandwidth efficiency etc.) could be outweighed?
Click to expand...
Yes but AMD works in a different way anyways.
 
I wonder wether is possible to implement Decision Feedback Equaliser in memory controller to provide better quality of eye diagram ?
 
Granath said:
But logic and SRAM etc. scales differently. So it has to be arranged so how.
Click to expand...
AMD has previously used shrinks smaller properties as a way to use dark silicon as thermal barriers in Zen vs Zen+
https://www.anandtech.com/show/12625/amd-second-generation-ryzen-7-2700x-2700-ryzen-5-2600x-2600/2
12nm_575px.png

(white square in 12LP image is just 14LPP size for reference)
 
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