AMD: R8xx Speculation

How soon will Nvidia respond with GT300 to upcoming ATI-RV870 lineup GPUs

  • Within 1 or 2 weeks

    Votes: 1 0.6%
  • Within a month

    Votes: 5 3.2%
  • Within couple months

    Votes: 28 18.1%
  • Very late this year

    Votes: 52 33.5%
  • Not until next year

    Votes: 69 44.5%

  • Total voters
    155
  • Poll closed .
From top to bottom:
Hemlock(R800), Cypress(RV870 300mm²), Cedar(RV840/~225mm²), Juniper(RV830/180mm²) and Redwood(RV810/120mm²).

If the line-up is wrong, I'll change my signature accordingly, for now. The specs that guy gave over at pconline were regurgitated, much like all the posts. The info came Endgadget/Inq where they show a Cypress with a launch/event date in September on the "17Mile Drive" course at Pebble Beach
 
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From top to bottom:
Hemlock(R800), Cypress(RV870 300mm²), Cedar(RV840/~225mm²), Juniper(RV830/180mm²) and Redwood(RV810/120mm²).

If the line-up is wrong, I'll change my signature accordingly, for now. The specs that guy gave over at pconline were regurgitated, much like all the posts. The info came Endgadget/Inq where they show a Cypress with a launch/event date in September on the "17Mile Drive" course at Pebble Beach
So the whole RV830 being cancelled and larger than RV840 is wrong?

LMAO. Awesome answer.
 
Maybe the 64bit segment is dead. Nobody buys 64bit GPUs for €32 if a 128bit GPU, which is more than twice as fast, costs €40.

The other possibility is, that 128bit (G)DDR3 part is cheaper to manufacture than a 64bit GDDR5 part. GDDR5 GPUs require some more die-space for the exatra pads - minimum die-size for 64bit GDDR5 interface could be close to minimum die-size for 128bit (G)DDR3 interface.

The other possibility is 128bit (G)DDR3 interface at 40nm now and 64bit GDDR5 after die-shrink.

Anyway, the 180mm²/300mm² die-size difference is identical (percentually) to RV730/RV770. Could it mean, that the 300mm² part carries 2,5x SPs (800->2000), just like RV730/RV770 (320->800)?
 
AMD can only sell non-IGP graphics for Intel CPU systems, so having no "RV810" would lock them out entirely from the next rung up from IGP. I freely admit, I've no idea of the sales for RV710s as stand-alone boards or in pre-built systems. Or what ATI+NVidia sales for this rung are in Intel systems.

Or, whether D3D11 is, in itself, relevant.

And, ahem, what about "professional" cards based on 64-bit? No idea what happens already...

As to 2000 ALU lanes, 300mm² sounds like a budget was bust. If the trend continues, how long before a major GPU is ~400mm²?

Jawed
 
It wouldn't be the first non-64bit product line-up. RV515/X1300 was 128bit, RV370/X300 too. 64bit parts came later, mainly after die-shrink.
 
It wouldn't be the first non-64bit product line-up. RV515/X1300 was 128bit, RV370/X300 too. 64bit parts came later, mainly after die-shrink.
RV515 supported 64- and 32-bit operation and there were such products. Previously, 64-bit was the smallest memory configuration allowed.
 
I'm thinking that AMD would want a 64-bit chip with an area of ~60mm². Being able to produce such a chip in a timely fashion seems like part and parcel of the sweet-spot strategy - and is presumably extra important on a D3D-version-inflection.

It would be nice if turning on tessellation with even the slowest 64-bit D3D11 GPU would increase performance, as tessellation, in general, should be used as a form of geometry compression...

Jawed
 
RV515 supported 64- and 32-bit operation and there were such products. Previously, 64-bit was the smallest memory configuration allowed.
Yes there were many products with some disabled functionality, but I'm speaking about native bus width. RV370 and RV515 were 128bit, while RV610 and RV710 were 64bit.

Anyway, you're right... RV810 could be 128bit GPU, but value models can have half of the memory bus disabled...
 
That link claims 1.5x the ALUs, 2.4x the TMUs, and 2x the ROPs (all with ~1.1x the bandwidth). I haven't been following things too closely, but are we really expecting a lower ALU:TMU ratio? :???:
 
That link claims 1.5x the ALUs, 2.4x the TMUs, and 2x the ROPs (all with ~1.1x the bandwidth). I haven't been following things too closely, but are we really expecting a lower ALU:TMU ratio? :???:

Looks reasonable to me. RV7xx generation was mostly TMU limited, not ALU limited, so increasing TMU's will give biggest performance improvement.

And bandwidth is expensive.

And they have improved the schedulers a lot, so it may be that they get better efficiency from their shader processors, so effective real-world shader performance may increase more than 1.5 times.
 
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