AMD: R8xx Speculation
- Thread starter Shtal
- Start date
No idea on the reasoning but I recall RV610 & RV620 being a similar shape...
Evergreen- ~11.76mm x 15.38mm = ~181mm2
RV610- ~7.7mm x 10.7mm = ~82.4mm3
RV620- ~7mm x 9.5mm = ~66.5mm2
Edit- Largon brought up an interesting point(on a diff forum), could this be AMD sandbagging? AMD touting this chip as their largest when in fact it is a RV830/RV840 meant to eventually replace top RV770/790?
Very impressive that they've got it running so early for sure - grats guys. I wonder: could this be a 192-bit GDDR5 part aiming at replacing everything up to and including HD4890? I certainly doubt it's 256-bit at that size, but it's a bit big for 128-bit too... Hmm!
RV670 had 192mm² so the difference is not so big, except that GDDR5 is said to need more pins than GDDR3.
So 256bit could still be possible, or?
I wouldn't call it RV840, but it would be nice to see what AMD could do with ~320-360mm^2....LordEC911 said:
384-bit/768MB GDDR5
96 tmus
48 rops
/drool...
They could probably have the single chip performance crown with that and sell it for $50-100 less than their slower competition. I doubt such a thing exists though, it makes too much sense.
@Arun: perhaps 224-bit?
Jawed
Legend
Nice. I see now that backface culling, for example, is difficult to make conservative due to the extent that vertices are displaced outwards from a patch surface.
Jawed
Jawed
Legend
The video I linked earlier is now back, though different address:
http://www.youtube.com/watch?v=-eTngR6M37Q
All the stuff in the top left corner has been removed, i.e. no codename and no performance.
Jawed
http://www.youtube.com/watch?v=-eTngR6M37Q
All the stuff in the top left corner has been removed, i.e. no codename and no performance.
Jawed
Jawed
Legend
Full slide deck:
http://www.hardocp.com/image.html?image=MTI0NDAwNDgyMEZJUWRlV3BYeEtfMV8xX2wuanBn
Also the "sooner than you think" line might be nothing more than a reference to games with D3D11 features. e.g. I'm guessing, based on the final "developers talk D3D11" video, there'll be a patch to update Battleforge.
Jawed
http://www.hardocp.com/image.html?image=MTI0NDAwNDgyMEZJUWRlV3BYeEtfMV8xX2wuanBn
Also the "sooner than you think" line might be nothing more than a reference to games with D3D11 features. e.g. I'm guessing, based on the final "developers talk D3D11" video, there'll be a patch to update Battleforge.
Jawed
Looks like some more DX10.1 games will get the DX11 treatment. other pics from that slide are from H.A.W.X.
With Codemasters I can see the upcoming Fuel and DiRT2 making 2009 DX11 releases.
Jawed
Legend
http://www.semiaccurate.com/2009/06/03/ati-shows-working-dx11-chips/
OpenCL?
Erm... OTOY's render cloud?
Jawed
Hmm, virtualisation isn't in D3D is it?
OpenCL?
Erm... OTOY's render cloud?
Jawed
I think he talks about D3D support FOR virtualization, a thing that nV has for a couple of months now.
Basically, virtual machines are able to use directx within their own environment.
SLI Multi-OS
http://www.nvidia.com/object/io_1238408514209.html.
Wouldn't be surprised. 180mm^2 sounds too conservative even for AMD. Although, it's too big for an RV840 too....hmmmmm. Guess size doesn't matter if the performance is there.
Jawed
Legend
It's more than curious, it's downright mystifying.
I can't help thinking that the small size of this chip implies it's not the biggest of AMD's 40nm D3D11 chips from the upcoming generation.
The non-squareness seems to be making about 2% difference in area. For what it's worth I get 11.71 * 15.51 = 181.6mm². A square die (same perimeter) would be 13.61mm on each side = 185.3mm².
Perhaps this is a 128-bit bus chip, i.e. RV740 + D3D11 + extra clusters. It would be brutally powerful, with <=16 clusters, 1280 ALU lanes, 64 TUs.
But that layout looks like a radical redesign. It makes me think it's a "memory-centric" design, where each of the "quarters" we're seeing on the die has its own memory interface. Trouble is, that sounds to me like you'd want a ring bus.
Jawed
Using the above figures, a square chip of same area would be 13.45mm each side, comparing perimeters gives all of 0.5mm more perimeter to the rectangle shape over the square. Its like they just needed that little bit extra
If they did such a chip, it would be quite some risk at the moment. I could possibly believe this was the juniper chip if it was a little smaller, but not at ~180mm2. As Arun said that implies a 192bit interface(maybe more), which in turn would require a 128bit and 64 bit part below to cover all the market segments.
Production underway? I dont think TSMC will be able to get going on this and the brother chip for about another month. Nvidia is in same boat, if only windows release was a bit closer to christmas.
We still don't know how well analog parts are scaled down with the new 40nm process.
The other curious thing is that until now, we haven't seen any 200+ mm² chip designs on the TSMC's 40nm tech. Both ATi's DX11 GPU and the current RV740 are small-scale parts, and the rumored GT21* line won't be a big daddy. Is there some fundamental flaw in the manufacturing process that makes it undesirable for mid- and large-sized ASICs?
The other curious thing is that until now, we haven't seen any 200+ mm² chip designs on the TSMC's 40nm tech. Both ATi's DX11 GPU and the current RV740 are small-scale parts, and the rumored GT21* line won't be a big daddy. Is there some fundamental flaw in the manufacturing process that makes it undesirable for mid- and large-sized ASICs?
Incidentally, I did some screenshots just from this Demo running on a Core i7 @3,5 GHz. It was literally minutes per frame.
Jawed
Legend
The perimeter of RV770 is ~65mm, so the ~54mm perimeter of this chip is pretty close. The length of RV770's CrossFireX Sideport is ~5.6mm. ~5mm of RV770's perimeter also looks to be either unused, or filled with non-IO stuff.
So it seems the ~54mm perimeter is very close to being able to fit a 256-bit bus...
I suppose it's worth pointing out that corners can't be "double-counted" when talking about perimeter for IO purposes, since the depth of IO areas is pretty large, ~1mm for GDDR.
Jawed
So it seems the ~54mm perimeter is very close to being able to fit a 256-bit bus...
I suppose it's worth pointing out that corners can't be "double-counted" when talking about perimeter for IO purposes, since the depth of IO areas is pretty large, ~1mm for GDDR.
Jawed
Similar threads
