Betanumerical
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Based on above posts in regards to caches and snooping, the XBONE is hUMA to none of its memory pools.
http://beyond3d.com/showpost.php?p=1775588&postcount=5590
Xbox One (Durango) Technical hardware investigation
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Based on above posts in regards to caches and snooping, the XBONE is hUMA to none of its memory pools.
http://beyond3d.com/showpost.php?p=1775588&postcount=5590
How is this different from the features of the "2013 Architectural Integration" vertical in the Bonaire slide i posted earlier?
I am not sure that rules out anything. What little I have read about HSA and hUMA from AMD and others always focuses on the ability to allow the gpu to readily access cpu memory and data structures. Using AMD's HMMU to allow the cpu and gpu to have a consistent view of virtual memory.
http://arstechnica.com/information-...orm-memory-access-coming-this-year-in-kaveri/
Even in one of the AMD's own diagram called hUMA key features, the cpu doesn't have a direct link to the gpu's physical memory.
Betanumerical
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Doesn't this require cache coherency because the GPU and CPU?
Doesn't the vgleak describe Durango having 30 GBs of coherent bandwidth between the cpu and gpu with the gpu having the ability to read and write to the cpu caches?
Haven't Fusion apus since onset or very early had coherency across the caches? Neither Onion nor Garlic are new.
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Betanumerical
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Doesn't it need to also go the other way? ie the CPU read the GPU cache? because it seems that doesn't happen on a memory access in the XBONE.
I think he is saying that AMD's own examples of what they define as hUMA only require the GPU to access CPU data in a fully coherent manner. HEre is what VGLeaks says on X1 in relation to that:
"The two CPU modules are fully coherent. The term fully coherent means that the CPUs do not need to explicitly flush in order for the latest copy of modified data to be available (except when using Write Combined access).
...The term I/O coherent means that those clients can access data in the CPU caches, but that their own caches cannot be probed.
When the CPU produces data, other system clients can choose to consume that data without any extra synchronization work from the CPU."
Re-reading the original document, the document does later confuse things by basically describing onion/garlic... so it appears to have coherent memory, but it may not have hUMA.
Betanumerical
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http://www.bjorn3d.com/wp-content/uploads/2013/04/AMD-HSA-hUMA_Page_10.jpg
This seems to disagree with that entirely, and that is straight from AMD as well. hUMA requires all clients to be coherent.
Hmmm...it does have direct access to the GPU cache though.
Yeah if there is some editorializing done by the author I would assume an update will be coming or a clarification from amd. If it's a translation issue that might be a different story.
I would assume that amd would want MS to have a a much hsa jazz as possible since it would most likely increase the chances of amd specific hsa infrastructure being rolled into windows.
Hopefully some more data on these issues will be dislodged as we get further into the fall.
Added: not saying that amd will be looking for an hsa version of windows just saying more support.
Yeah, I saw that. There is hardware coherency across the caches but the diagram seems to indicate that hw coherency doesn't exists across the entire region of physical memory. Where there is incoherent memory dedicated to the gpu. I am assuming that the cpu is able to address that data through the virtual memory system using AMD's HMMU. And given that AMD's past implementation of maintaining coherency across caches by the having the gpu access the cpu, I don't think one can naturally assume that the cpu can read or write directly to memory on the gpu. I haven't read anything from AMD that readily describes the cpu functioning in such manner.
Talking about the XB1's memory system. I get the impression that MS's rolled their own solution. eSRAM, DMEs and the compression logic all seem to be something MS came up with. You don't hear AMD talk about these aspects of the hardware. In fact I've haven't really read AMD talking up Durango at all. They mention that XB1 contains AMD hardware but they seem to give way more air time to the PS4.
I think it should be noted that hUMA and HSA are AMD's implementations of a unified memory system. There is nothing that says MS went with an alternative implementation.
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AMD saying that they can't comment on that. What it seems is that this AMD guy said some things off the record and a journalist just publish it, however Cerny already hinted PS4 would support something very similar to hUMA, maybe not the final implementation AMD will be using for their future chips but that it would share some features.
i think that's just cause ms hasnt talked about the system slot and Sony has. I think after hot chips both ms and and will talk more open about xbox hardware, especially if it turns out to be vi based.
There's a problem in how the information has been run through the filter of the writer's interpretation of the comments of the AMD PR rep, then further filtered by a translation from (English/?)German/English and finally filtered by my own understanding. Having said that, it looks like the writer is taking disparate information and drawing a conclusion.
AMD has said that hUMA will greatly increase performance.
AMD rep said that PS4 has hUMA while XBOne does not.
Therefore, PS4 should have greatly increased performance over XBOne. This (PS4 having better performance over XBOne) is supported by statements made by developers.
There's a semantic difference there, if not a practical one. I would find it extremely odd for a PR rep for a company that is partnered with two companies to comment in this way, even off the record.
Oooo a vi based gaming system! It's an efficient text editor sure but where do you put your fingers since there no home row or keyboard for that matter
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