Does not say much for MS hardware engineers if they only figured this out now.Sorry, but that's a lousy link to that article as you fail to convey the key info.
XB1 ESRAM gains significant 88% BW increase to 192 GB/s theoretical peak.
Although reading the article, that's not quite right. It's actually a case of
MS Engineers stumble across gains in the ESRAM performance allowing higher BW to devs.
Remember, kids, don't just read the titles to understand an article.
Does not say much for MS hardware engineers if they only figured this out now.
Huh, so DDR3 + eSRAM bandwidth actually is more than 200GB/s.
Or the final hardware is a somewhat more capable than old documents suggested, and they wanted to get that out there.Is ridiculous.Maybe they find next time that from production came 14 CUs instead of 12.Wasnt Richard from DF a technical journalist?.
Or the final hardware is a somewhat more capable than old documents suggested, and they wanted to get that out there.
Using fantasy land mathematics, yes, more than 200
Is ridiculous.Maybe they find next time that from production came 14 CUs instead of 12.Wasnt Richard from DF a technical journalist?.
Is the same.The 102GB/s is read 102GB/s write.They found out now that both can be done simultaneously?.
Sorry, but that's a lousy link to that article as you fail to convey the key info.
XB1 ESRAM gains significant 88% BW increase to 192 GB/s theoretical peak.
Although reading the article, that's not quite right. It's actually a case of
MS Engineers stumble across gains in the ESRAM performance allowing higher BW to devs.
Remember, kids, don't just read the titles to understand an article.
From the DF article, I sounds like they can do read and write together under some circumstances (when they found some "holes" to squeeze some processing inside).
From the DF article, I sounds like they can do read and write together under some circumstances (when they found some "holes" to squeeze some processing inside).
On the same 128 byte interface how can you transfer more information than what is theoreticaly possible? Because this is what we are talking about.
In fact isnt this news talking about a downgrade?. If clock was still 800Mhz the theorical max bandwidth if writing and reading at the same time would be 204 GB/s.They claim 192 that reversing would take us to 96 GB/s read 96 GB/s write and a clock of 750MHz.
It's believed that 133GB/s throughput has been achieved with alpha transparency blending operations (FP16 x4).