DaveBaumann said:So why use that if you can get better performance out of units dedicated to the task that its required to to for similar or smaller die sizes?
First of all, who said it was added preformance? In our thought experiment, 16 S|APUs at ISSCC clock would have a higher output than your 48 unified ALUs in the X2 at developer clock. Also, vastly greater usable flexibility, unified ISA and computational fabric.
And the same way a GPU does it Dave, that's the point. One day I'll get an actual answer out of you on the difference between a unified Vector|Scalar pathway in an APU and one in an ALU -- and then you can justify all your, frankly, shit comments about how STI would have nothing to add, et infinitum.,